Editing Bitboard (section)

===Processor use===
====Pros====
Bitboard representations use parallel [[bitwise operation|bitwise]] operations available on nearly all [[CPU]]s that complete in one cycle and are fully pipelined and cached etc.  Nearly all CPUs have [[Logical conjunction|AND]], [[Logical disjunction|OR]], [[Logical nor|NOR]], and [[Exclusive or|XOR]].  
Furthermore, modern CPUs have [[instruction pipeline]]s that queue instructions for execution.  A processor with multiple execution units can perform more than one instruction per cycle if more than one instruction is available in the pipeline.  Normal instruction sequences with branches may cause the pipeline to empty if a branch is mispredicted. Many bitboard operations require fewer conditionals and therefore increase pipelining and make effective use of multiple execution units on many CPUs.

CPUs have a bit width which they are designed toward and can carry out bitwise operations in one cycle in this width.  So, on a 64-bit or more CPU, 64-bit operations can occur in one instruction.  There may be support for higher or lower width instructions.  Many 32-bit CPUs may have some 64-bit instructions and those may take more than one cycle or otherwise be handicapped compared to their 32-bit instructions.

If the bitboard is larger than the width of the instruction set, multiple instructions will be required to perform a full-width operation on it.  So a program using 64-bit bitboards would run faster on a 64-bit processor than on a 32-bit processor.

====Cons====
Bitboard representations have much longer code, both source and object code.  Long bit-twiddling sequences are technically tricky to write and debug.  The bitboards themselves are sparse, sometimes containing only a single one bit in 64, so bitboard implementations are memory-intensive.  Both these issues may increase cache misses or cause cache thrashing.

If the processor does not have hardware instructions for 'first one' (or '[[count leading zeros]]') and '[[ONES|count ones]]' (or 'count zeros'), the implementation will be significantly handicapped, as these operations are extremely inefficient to code as assembly language loops.