Open main menu
Home
Random
Recent changes
Special pages
Community portal
Preferences
About Wikipedia
Disclaimers
Incubator escapee wiki
Search
User menu
Talk
Dark mode
Contributions
Create account
Log in
Editing
Bounds checking
(section)
Warning:
You are not logged in. Your IP address will be publicly visible if you make any edits. If you
log in
or
create an account
, your edits will be attributed to your username, along with other benefits.
Anti-spam check. Do
not
fill this in!
== Hardware bounds checking == The safety added by bounds checking necessarily costs CPU time if the checking is performed in software; however, if the checks could be performed by hardware, then the safety can be provided "for free" with no runtime cost. An early system with hardware bounds checking was the [[ICL 2900 Series]] mainframe announced in 1974.<ref>{{cite book |pages=17, 77 |url=http://www.fujitsu.com/uk/Images/icl-2900-series-by-jk-buckle.pdf |title=The ICL 2900 Series |author=J. K. Buckle |publisher=Macmillan Computer Science Series |year=1978 |isbn=978-0-333-21917-1 |access-date=20 April 2018 |archive-date=20 April 2018 |archive-url=https://web.archive.org/web/20180420203006/http://www.fujitsu.com/uk/Images/icl-2900-series-by-jk-buckle.pdf |url-status=dead }}</ref> The [[VAX]] computer has an INDEX assembly instruction for array index checking which takes six operands, all of which can use any VAX addressing mode. The B6500 and similar [[Burroughs Corporation|Burroughs]] computers performed bound checking via hardware, irrespective of which computer language had been compiled to produce the machine code. A limited number of later [[CPU]]s have specialised instructions for checking bounds, e.g., the CHK2 instruction on the [[Motorola 68000#Interrupts|Motorola 68000]] series. Research has been underway since at least 2005 regarding methods to use x86's built-in virtual memory management unit to ensure safety of array and buffer accesses.<ref>{{Cite book | doi=10.1109/DSN.2005.25| chapter=Checking Array Bound Violation Using Segmentation Hardware| title=2005 International Conference on Dependable Systems and Networks (DSN'05)| pages=388β397| year=2005| last1=Lap-Chung Lam| last2=Tzi-Cker Chiueh| isbn=0-7695-2282-3| s2cid=6278708}}</ref> In 2015 Intel provided their [[Intel MPX]] extensions in their [[Skylake (microarchitecture)|Skylake]] processor architecture which stores bounds in a CPU register and table in memory. As of early 2017 at least [[GNU Compiler Collection|GCC]] supports MPX extensions.
Edit summary
(Briefly describe your changes)
By publishing changes, you agree to the
Terms of Use
, and you irrevocably agree to release your contribution under the
CC BY-SA 4.0 License
and the
GFDL
. You agree that a hyperlink or URL is sufficient attribution under the Creative Commons license.
Cancel
Editing help
(opens in new window)