Editing Hartley oscillator (section)

===Practical example===
[[File:Hartley Osz JFET Drain.gif|framed|Practical common-drain Hartley oscillator with an oscillation frequency of ~10&nbsp;MHz]]

The schematic shows an example with component values.<ref>{{cite book   
  | last = Hayward
  | first = Wes
  | title = Introduction to Radio Frequency Design
  | chapter = Figure 7.16 A practical JFET Hartley oscillator
  | publisher = ARRL
  | year = 1994
  | location = US
  | page = 285
  | url = https://archive.org/details/isbn_9780872594920
  | doi = 
  | id = 
  | isbn = 0-87259-492-0}}</ref> Instead of [[field-effect transistors]], other active components such as [[bipolar junction transistor]]s or [[vacuum tube]]s, capable of producing gain at the desired frequency, could be used.

The [[common-drain|common drain amplifier]] has a high input impedance and a low output impedance. Therefore the amplifier input is connected to the high impedance top of the LC circuit C1, L1, L2 and the amplifier output is connected to the low impedance tap of the LC circuit. The [[grid leak]] C2 and R1 sets the [[operating point]] automatically through [[Biasing#Grid_leak_bias|grid leak bias]]. A smaller value of C2 gives less [[Distortion#Harmonic_distortion|harmonic distortion]], but requires a larger load resistor. The load resistor RL is part of the simulation, not part of the circuit.