Editing Intel 8086 (section)

===The first x86 design===
[[File:Intel 8086 CPU Die.JPG|thumb|Intel 8086 CPU die image]]
The 8086 project started in May 1976<ref>{{Cite web |title=Birth of a standard: The Intel 8086 microprocessor turns 40 today |url=https://www.pcworld.com/article/535966/article-7512.html |access-date=2025-03-08 |website=PCWorld |language=en}}</ref> and was originally intended as a temporary substitute for the ambitious and delayed [[iAPX 432]] project. It was an attempt to draw attention from the less-delayed 16-bit and [[32-bit computing|32-bit]] processors of other manufacturers — [[Motorola]], [[Zilog]], and [[National Semiconductor]].

Whereas the 8086 was a 16-bit microprocessor, it used the same [[microarchitecture]] as Intel's 8-bit microprocessors (8008, 8080, and 8085). This allowed [[assembly language]] programs written in 8-bit to [[Assembly language translator|seamlessly migrate]].<ref name="Scanlon_1988"/> New instructions and features — such as signed integers, base+offset addressing, and self-repeating operations — were added. Instructions were added to assist source code compilation of [[nested function]]s in the [[ALGOL]]-family of languages, including [[Pascal (programming language)|Pascal]] and [[PL/M]]. According to principal architect [[Stephen P. Morse]], this was a result of a more software-centric approach. Other enhancements included [[microcode]] instructions for the multiply and divide assembly language instructions. Designers also anticipated [[coprocessors]], such as [[Intel 8087|8087]] and [[Intel 8089|8089]], so the bus structure was designed to be flexible.

The first revision of the instruction set and high level architecture was ready after about three months,<ref group="note" >Rev.0 of the instruction set and architecture was ready in about three months, according to Morse.</ref> and as almost no CAD tools were used, four engineers and 12&nbsp;layout people were simultaneously working on the chip.<ref group="note" >Using [[rubylith]], light boards, rulers, electric erasers, and a [[digitizer]] (according to Jenny Hernandez, member of the 8086 design team, in a statement made on Intel's webpage for its 25th birthday).</ref> The 8086 took a little more than two years from idea to working product, which was considered fast for a complex design in the 1970s.

The 8086 was sequenced<ref group="note" >8086 used less microcode than many competitors' designs, such as the MC68000 and others</ref> using a mixture of [[random logic]]<ref>{{cite book |first1=Randall L. |last1=Geiger |first2=Phillip E. |last2=Allen |first3=Noel R. |last3=Strader |title=VLSI design techniques for analog and digital circuits |publisher=McGraw-Hill |year=1990 |isbn=0-07-023253-9 |pages=779 |chapter=Random Logic vs. Structured Logic Forms}} — Illustration of use of "random" describing CPU control logic</ref> and [[microcode]] and was implemented using depletion-load nMOS circuitry with approximately 20,000&nbsp;active [[transistor]]s (29,000 counting all [[read-only memory|ROM]] and [[Programmable logic array|PLA]] sites). It was soon moved to a new refined nMOS manufacturing process called [[HMOS]] (for High performance MOS) that Intel originally developed for manufacturing of fast [[static RAM]] products.<ref group="note" >Fast static RAMs in MOS technology (as fast as bipolar RAMs) was an important product for Intel during this period.</ref> This was followed by HMOS-II, HMOS-III versions, and, eventually, a fully static [[CMOS]] version for battery powered devices, manufactured using Intel's [[CHMOS]] processes.<ref group="note" >CHMOS is Intel's name for CMOS circuits manufactured using processing steps very similar to [[HMOS]].</ref> The original chip measured 33&nbsp;mm² and minimum feature size was 3.2&nbsp;μm. The MUL and DIV instructions were very slow due to being microcoded so x86 programmers usually just used the bit shift instructions for multiplying and dividing instead. {{Dubious|1=MUL and DIV|reason=Programmers use shifts for powers of two and shift/adds/subs for small multipliers but it is impossible to write a general 16 x 16 bit multiply on the 8086 that is faster than the MUL instruction|date=December 2024}}

The 8086 was die-shrunk to 2 μm in 1981; this version also corrected a stack register bug in the original 3.5 μm chips.{{clarification needed|date=April 2025}} Later 1.5 μm and CMOS variants were outsourced to other manufacturers and not developed in-house.{{citation needed|date=April 2025}}

The architecture was defined by [[Stephen P. Morse]] with some help from Bruce Ravenel (the architect of the 8087) in refining the final revisions. Logic designer Jim McKevitt and John Bayliss were the lead engineers of the hardware-level development team<ref group="note" >Other members of the design team were Peter A.Stoll and Jenny Hernandez.</ref> and Bill Pohlman the manager for the project. The legacy of the 8086 is enduring in the basic instruction set of today's personal computers and servers; the 8086 also lent its last two digits to later extended versions of the design, such as the [[Intel 286]] and the [[Intel 386]], all of which eventually became known as the [[x86]] family. (Another reference is that the [[PCI Configuration Space|PCI Vendor ID]] for Intel devices is 8086<sub>h</sub>.)