Editing Inverter (logic gate) (section)

==Electronic implementation==
An inverter circuit outputs a voltage representing the opposite logic-level to its input. Its main function is to invert the input signal applied. If the applied input is low then the output becomes high and vice versa. Inverters can be constructed using a single [[NMOS logic|NMOS]] transistor or a single [[PMOS logic|PMOS]] transistor coupled with a [[resistor]].  Since this "resistive-drain" approach uses only a single type of transistor, it can be fabricated at a low cost.  However, because current flows through the resistor in one of the two states, the resistive-drain configuration is disadvantaged for power consumption and processing speed.  Alternatively, inverters can be constructed using two complementary transistors in a [[CMOS]] configuration.  This configuration greatly reduces power consumption since one of the transistors is always off in both logic states.<ref>{{cite book |last1=Nair |first1=B. Somanathan |title=Digital electronics and logic design |date=2002 |publisher=PHI Learning Pvt. Ltd. |isbn=9788120319561 |page=240 |url=https://books.google.com/books?id=WK45wLHL-ycC&pg=PA240 |language=en}}</ref>  Processing speed can also be improved due to the relatively low resistance compared to the NMOS-only or PMOS-only type devices.  Inverters can also be constructed with [[bipolar junction transistor]]s (BJT) in either a  [[resistor–transistor logic]] (RTL) or a [[transistor–transistor logic]] (TTL) configuration.

[[Digital data|Digital]] electronics circuits operate at fixed voltage levels corresponding to a logical 0 or 1 (see [[Binary numeral system|binary]]).  An inverter circuit serves as the basic logic gate to swap between those two voltage levels.  Implementation determines the actual voltage, but common levels include (0, +5V) for TTL circuits.

<gallery heights="170px" widths="180px" class="skin-invert-image">
Image:NMOS NOT.svg|[[NMOS logic]] inverter
Image:PMOS NOT.svg|[[PMOS logic]] inverter
Image:CMOS Inverter.svg|Static [[CMOS logic]] inverter
Image:RTL NOT Gate.svg|NPN [[resistor–transistor logic]] inverter
Image:Puertas NOT con transistores.jpg|NPN [[transistor–transistor logic]] inverter
</gallery>

===Digital building block===
[[File:CMOS 4049 diagram.svg|class=skin-invert-image|thumb|right|150px|This schematic diagram shows the arrangement of NOT gates within a standard 4049 CMOS hex inverting buffer.]]

The inverter is a basic building block in digital electronics. Multiplexers, decoders, state machines, and other sophisticated digital devices may use inverters.

The ''hex inverter'' is an [[integrated circuit]] that contains six (''[[wikt:hexa-|hexa-]]'') inverters. For example, the [[7400 series|7404]] [[Transistor–transistor logic|TTL]] chip which has 14 pins and the 4049 [[CMOS]] chip which has 16 pins, 2 of which are used for power/referencing, and 12 of which are used by the inputs and outputs of the six inverters (the 4049 has 2 pins with no connection).

==== Analytical representation ====
<math>f(a)=1-a</math> is the analytical representation of NOT gate:
* <math>f(0)=1-0=1</math>
* <math>f(1)=1-1=0</math>

=== Alternatives ===
{{further|NAND logic|NOR logic}}
If no specific NOT gates are available, one can be made from the universal [[NAND gate|NAND]] or [[NOR gate|NOR]] gates,<ref>{{cite book |last1=M. Morris |first1=Mano |last2=R. Kime |first2=Charles |title=Logic and computer design fundamentals |date=2004 |publisher=Prentice Hall |isbn=0133760634 |page=73 |edition=3 |url=https://books.google.com/books?id=jPEWogEACAAJ&q=Logic+and+Computer+Design+Fundamentals}}</ref> or an [[XOR gate]] by setting one input to high.

{| align=center style="text-align:center" class=skin-invert-image
! width="250" |Desired gate!! width="150" |NAND construction!! width="150" |NOR construction
|-
| [[File:NOT ANSI Labelled.svg]] || [[Image:NOT from NAND.svg]] || [[File:NOT from NOR.svg]]
|}

===Performance measurement===
[[File:Inverter voltage transfer curve.png|thumb|300px|Voltage transfer curve for a 20 μm inverter fabricated at [[North Carolina State University]]]]

Digital inverter quality is often measured using the voltage transfer curve (VTC), which is a plot of output vs. input voltage. From such a graph, device parameters including noise tolerance, gain, and operating logic levels can be obtained.

Ideally, the VTC appears as an inverted step function – this would indicate precise switching between ''on'' and ''off'' – but in real devices, a gradual transition region exists. The VTC indicates that for low input voltage, the circuit outputs high voltage; for high input, the output tapers off towards the low level. The slope of this transition region is a measure of quality – steep (close to vertical) slopes yield precise switching.

The tolerance to noise can be measured by comparing the minimum input to the maximum output for each region of operation (on / off).

==== Linear region as analog amplifier ====
Since the transition region is steep and approximately linear, a properly-biased CMOS inverter digital logic gate may be used as a high-gain analog [[linear amplifier]]<ref>{{Cite web |orig-date=July 1973 |date=April 2003 |title=Application Note 88: CMOS Linear Applications |url=https://www.elektronik-kompendium.de/public/schaerer/FILES/an-88.pdf |website=[[National Semiconductor]]}}</ref><ref>{{Cite web |last=Stonier-Gibson |first=David |title=CMOS gate as linear amplifier |url=http://melbmcu.weebly.com/cmos-gate-as-analogue-amplifier.html |url-status=live |archive-url=https://web.archive.org/web/20220331092505/http://melbmcu.weebly.com/cmos-gate-as-analogue-amplifier.html |archive-date=2022-03-31 |access-date=2023-05-18 |website=Microcontroller Group, Moorabbin, Melbourne |language=en}}</ref><ref>{{Citation |title=CMOS Inverters as Analog Amplifiers (Adventures in Field Programmable Analog Arrays) | date=14 December 2021 |url=https://www.youtube.com/watch?v=DnO5sMU5DqU |access-date=2023-05-18 |language=en}}, Aaron Lanterman, Georgia Tech</ref><ref>{{Cite web |title=CMOS-Inverter-as-an-Amplifier {{!}} Analog-CMOS-Design {{!}}{{!}} Electronics Tutorial |url=https://www.electronics-tutorial.net/Analog-CMOS-Design/MOSFET-Amplifiers/CMOS-Inverter-as-an-Amplifier/ |access-date=2023-05-18 |website=www.electronics-tutorial.net}}</ref><ref>{{Cite web |title=Activity: CMOS Amplifier stages - ADALM2000 [Analog Devices Wiki] |url=https://wiki.analog.com/university/courses/electronics/electronics-lab-20 |url-status=live |archive-url=https://web.archive.org/web/20220808072638/https://wiki.analog.com/university/courses/electronics/electronics-lab-20 |archive-date=2022-08-08 |access-date=2023-05-18 |website=wiki.analog.com}}</ref> or even combined to form an [[opamp]].<ref>{{Cite web |last=Weltin-Wu |first=Colin |date=2013-11-18 |title=A true op-amp made from inverters |url=https://www.edn.com/a-true-op-amp-made-from-inverters/ |access-date=2023-05-18 |website=EDN |language=en-US}}</ref> Maximum gain is achieved when the input and output operating points are the same voltage, which can be biased by connecting a resistor between the output and input.<ref>{{Cite journal |last=Bae |first=Woorham |date=2019-09-20 |title=CMOS Inverter as Analog Circuit: An Overview |journal=Journal of Low Power Electronics and Applications |language=en |volume=9 |issue=3 |pages=26 |doi=10.3390/jlpea9030026 |doi-access=free |issn=2079-9268}}</ref>