Editing Kronos (computer) (section)

==Hardware==
An advanced version of Kronos was based on a 32-bit stack-type КА1845ВМ1 processor, КА1845ВС1 data processing unit, and УУП memory control unit. All the three were designed and fabricated by КНИИМП, Kiev Research Institute of Microdevices.
* [http://www.155la3.ru/k1845.htm КА1845ВМ1] had 246 commands, which allowed supporting Modula-2 language. It also featured hardware support of interrupts and process synchronization. The CPU was fabricated in a 2.5 um CMOS technology with two layers of metallization and packaged in a planar 84-pin metal-polymer case. It contains 199 thousands elements and has area of 8.55x8.1 mm^2. The maximum clock frequency is 10 MHz.
* [http://www.155la3.ru/k1845.htm КА1845ВС1] contained ALU, 8x32 stack, matrix shifter, 16x32 register block, and status flag multiplexers. The amount of addressable memory is 4 GB. The chip area is 5.8x5.25 mm^2, 16 thousand elements.
* [http://www.155la3.ru/uup.htm УУП] provided operation with virtual memory up to 4 GB. It contains a data cache (128x32), a redirect buffer (128x40), a dynamic RAM controller, and an error detection and correction circuit. Memory access time does nor exceed 100 ns. УУП chip contains 102 thousands elements and has area of 9.1x7.3 mm^2.