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=== Quad-Pumped Front-Side Bus === The Northwood and Willamette cores feature an external Front Side Bus (FSB) that runs at 100 MHz which transfers four bits per clock cycle, thus having an effective speed of 400 MHz. Later revisions of the Northwood core, along with the Prescott core ([[Pentium D|and derivatives]]) have an effective 800 MHz front-side bus (200 MHz quad pumped). [https://arstechnica.com/uncategorized/2004/07/ask-ars-20040710/]
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