Editing Phase-locked loop (section)

==History==
Spontaneous synchronization of weakly coupled [[pendulum clock]]s was noted by the Dutch physicist [[Christiaan Huygens]] as early as 1673.<ref>Christiaan Huygens, ''Horologium Oscillatorium'' … (Paris, France:  F. Muguet, 1673),  [https://archive.org/details/bub_gb_SOjZR1P1eE8C/page/n37 pages 18–19.]  From page 18:  ''" … illudque accidit memoratu dignum, … brevi tempore reduceret."'' ( … and it is worth mentioning, since with two clocks constructed in this form and which we suspend in like manner, truly the cross beam is assigned two fulcrums [i.e., two pendulum clocks were suspended from the same wooden beam]; the motions of the pendulums thus share the opposite swings between the two [clocks], since the two clocks at no time move even a small distance, and the sound of both can be heard clearly together always: for if the innermost part [of one of the clocks] is disturbed with a little help, it will have been restored in a short time by the clocks themselves.)  English translation provided by Ian Bruce's translation of [http://www.17centurymaths.com/contents/huygens/horologiumpart1.pdf ''Horologium Oscillatorium'' … ], pages 16–17.</ref> Around the turn of the 19th century, [[John William Strutt, 3rd Baron Rayleigh|Lord Rayleigh]] observed synchronization of weakly coupled organ pipes and [[tuning fork]]s.<ref>See:
*  Lord Rayleigh, ''The Theory of Sound'' (London, England:  Macmillan, 1896), vol. 2.  The synchronization of organ pipes in opposed phase is mentioned in §322c, [https://archive.org/details/theorysound05raylgoog/page/n239 pages 221–222.]
*  Lord Rayleigh (1907) "Acoustical notes — VII", ''Philosophical Magazine'', 6th series, '''13''' :  316–333.  See "Tuning-forks with slight mutual influence", [https://books.google.com/books?id=vVjKOdktZhsC&pg=PA322 pages 322–323.]</ref> In 1919, [[William Eccles (physicist)|W. H. Eccles]] and J. H. Vincent found that two electronic oscillators that had been tuned to oscillate at slightly different frequencies but that were coupled to a resonant circuit would soon oscillate at the same frequency.<ref>See:
*  Vincent (1919) "On some experiments in which two neighbouring maintained oscillatory circuits affect a resonating circuit", ''Proceedings of the Physical Society of London'', '''32''', pt. 2, 84–91.
*  W. H. Eccles and J. H. Vincent, ''British Patent Specifications'', '''163''' :  462 (17 Feb. 1920).</ref> Automatic synchronization of electronic oscillators was described in 1923 by [[Edward Victor Appleton]].<ref>E. V. Appleton (1923) "The automatic synchronization of triode oscillators", ''Proceedings of the Cambridge Philosophical Society'', '''21''' (Part III): 231–248.  Available on-line at:  [https://archive.org/stream/proceedingscambr21camb#page/231/mode/2up Internet Archive].</ref>

In 1925, [[David Robertson (engineer)|David Robertson]], first professor of electrical engineering at the [[University&nbsp;of Bristol]], introduced phase locking in his clock design to control the striking of the bell Great George in the new [[Wills Memorial Building]]. Robertson's clock incorporated an electromechanical device that could vary the rate of oscillation of the pendulum, and derived correction signals from a circuit that compared the pendulum phase with that of an incoming [[telegraph]] pulse from [[Greenwich Observatory]] every morning at 10:00 GMT. Including equivalents of every element of a modern electronic PLL, Robertson's system was notably ahead of its time in that its phase detector was a [[relay logic]] implementation of the [[transistor]] circuits for phase/frequency detectors not seen until the 1970s.&nbsp;

Robertson's work predated research towards what was later named the phase-lock loop in 1932, when British researchers developed an alternative to [[Edwin Armstrong]]'s [[superheterodyne receiver]], the [[Homodyne detection|Homodyne]] or [[direct-conversion receiver]]. In the homodyne or synchrodyne system, a [[local oscillator]] was tuned to the desired input frequency and multiplied with the input signal. The resulting output signal included the original modulation information. The intent was to develop an alternative receiver circuit that required fewer tuned circuits than the superheterodyne receiver. Since the local oscillator would rapidly drift in frequency, an automatic correction signal was applied to the oscillator, maintaining it in the same phase and frequency of the desired signal. The technique was described in 1932, in a paper by Henri de Bellescize, in the French journal ''L'Onde Électrique''.<ref>Henri de Bellescize, "La réception synchrone", ''L'Onde Électrique'' (later: ''Revue de l'Electricité et de l'Electronique''), vol. 11, pages 230–240 (June 1932).</ref><ref>See also:  French patent no. 635,451 (filed: 6 October 1931; issued: 29 September 1932); and U.S. patent [http://patimg1.uspto.gov/.piw?Docid=01990428&homeurl=http%3A%2F%2Fpatft.uspto.gov%2Fnetacgi%2Fnph-Parser%3FSect1%3DPTO2%2526Sect2%3DHITOFF%2526p%3D1%2526u%3D%25252Fnetahtml%25252FPTO%25252Fsearch-bool.html%2526r%3D1%2526f%3DG%2526l%3D50%2526co1%3DAND%2526d%3DPALL%2526s1%3D1,990,428.PN.%2526OS%3DPN%2F1,990,428%2526RS%3DPN%2F1,990,428&PageNum=&Rtype=&SectionNum=&idkey=NONE&Input=View+first+page "Synchronizing system"], no. 1,990,428 (filed: 29 September 1932; issued: 5 February 1935).</ref><ref>[http://www.uoguelph.ca/~antoon/gadgets/pll/pll.html Notes for a University of Guelph course describing the PLL and early history, including an IC PLL tutorial] {{webarchive|url=https://web.archive.org/web/20090224002345/http://www.uoguelph.ca/~antoon/gadgets/pll/pll.html |date=2009-02-24 }}</ref>

In analog television receivers since at least the late 1930s, phase-locked-loop horizontal and vertical sweep circuits are locked to synchronization pulses in the broadcast signal.<ref>{{cite web|url=http://www.sxlist.com/techref/io/video/ntsc.htm |title=National Television Systems Committee Video Display Signal IO |publisher=Sxlist.com |access-date=2010-10-14}}</ref>
[[File:Auerswald COMander Basic - Mainboard - On Semiconductor HC4046A-3027.jpg|thumb|[[ON Semiconductor]] HC4046A]]

In 1969, [[Signetics]] introduced a line of low-cost monolithic [[integrated circuits]] like the NE565 using [[bipolar transistors]], that were complete phase-locked loop systems on a chip,<ref>{{Cite journal |last1=Grebene |first1=A. |last2=Camenzind |first2=H. |date=1969 |title=Phase locking as a new approach for tuned integrated circuits |url=https://ieeexplore.ieee.org/document/1154749 |journal=ISSCC Digest of Technical Papers |volume=XII |pages=100–101 |doi=10.1109/ISSCC.1969.1154749 |via=[[IEEE Xplore]]|url-access=subscription }}</ref> and applications for the technique multiplied. A few years later, [[RCA]] introduced the [[List of 4000 series integrated circuits|CD4046]] Micropower Phase-Locked Loop using [[CMOS]], which also became a popular integrated circuit building block.