Editing Power Mac G5 (section)

== Architecture ==
[[File:PPC-970fx.jpg|thumb|The PowerPC 970FX inside a PowerMac G5.]]
The Power Mac G5 line in 2006 consisted of three, dual-core PowerPC G5 configurations, which can communicate through its [[HyperTransport]] at half its internal clock speed. Each processor in the Power Mac G5 has two unidirectional [[32-bit]] pathways: one leading to the processor and the other from the processor. These result in a total bandwidth of up to 20&nbsp;GB/s. The processor at the heart of the Power Mac G5 has a "[[superscalar]], superpipelined" execution core that can handle up to 216 in-flight instructions, and uses a [[128-bit]], 162-instruction [[SIMD]] unit ([[AltiVec]]).

All modern 32-bit x86 processors since the [[Pentium Pro]] have the [[Physical Address Extension]] (PAE) feature, which permits them to use a 36-bit physical memory address to address a maximum of 2<sup>36</sup> bytes (64 gigabytes) of [[physical memory]], while the PowerPC 970 processor is capable of addressing 2<sup>42</sup> bytes (4 [[terabyte]]s) of physical memory and 2<sup>64</sup> bytes (16 [[exabyte]]s) of [[virtual memory]]. Due to its [[64-bit]] processor (and 42-bit [[Memory management unit|MMU]]), the final revision of the Power Mac G5 can hold 16&nbsp;GB of [[DDR2 SDRAM|Dual-Channel DDR2 PC4200]] RAM using eight memory slots, with support for [[Error-correcting code|ECC]] memory.