Editing Zilog Z8000 (section)

===16-bit design===
While Shima was still working on the Z80 layout, Faggin began considering its future replacement by a 16-bit design, with the goal of being the first company to bring a new 16-bit single-chip design to market.{{efn|Several multi-chip 16-bit microprocessors existed by this point, but they were all based on existing [[minicomputer]] designs and were generally too expensive for general use. Single-chip versions of these emerged, but they remained expensive.{{sfn|Slater|2007|pp=4,5}}}} He felt that expanding the Z80 to 16-bits was not appropriate, the larger [[computer word]] size meant that many more features could be offered in the [[instruction set]] and the deliberately simple instructions of earlier designs would lead to chips that would be outperformed by freshly-designed 16-bit designs.{{sfn|Slater|2007|pp=2,3}}

In January 1976, Faggin hired Bernard Peuto, formerly of [[Amdahl Corporation]]. Peuto had previously studied and published extensively on the topic of word length, instruction sets and code density. The initial meetings on the concept were held at the end of March, at which time Faggin told Peuto he wanted the architecture completed in three months. The instruction set was delivered on time, but then it was time to turn that into a complete design.{{sfn|Slater|2007|p=3}} Peuto's design included the ability to work with 8-, 16- and 32-bit data, flexible addressing modes, and dedicated coprocessor support.{{sfn|Slater|2007|p=6}}

It was during this time that Ungermann explained the economics of the chip industry to Peuto, which were strongly influenced by the size of the chip. At the time, most processors used 40-pin [[dual in-line package]]s (DIPs), but some used 28-pin packages for lower-cost systems, while others were using 48 or 64-pin packages for more powerful systems like minicomputers. The need to balance cost and power ultimately led to the idea of having two versions of the chip, the Z8001 with 23 [[address bus]] pins in a 48-pin chip, and the Z8002 with 16 address pins in a 40-pin chip.{{sfn|Slater|2007|p=6}}

In order to have a single instruction set that could be used on either design, they made the decision to use [[segmented memory]].{{sfn|Slater|2007|p=6}} In this concept, the basic instruction set uses 16-bit addresses, which could then be run on either version of the chip. To access larger amounts of memory, a separate set of instructions could set a 7-bit "segment number". On the 23-pin versions, the 7-bit segment number was sent out at the same time as the 16-bit base address, creating a single 23-bit address. This early design choice would ultimately have a profound effect on the desirability of the Z8000 series.{{sfn|Slater|2007|p=7}}

Shima would be responsible for turning the conceptual design into a physical one, and with the basic design completed, Shima first began considering it on 11 June 1976. At the time the system was to have eight 16-bit registers, and Shima began laying out such a design. But very late in the process the design team concluded that it needed more, and when they asked in October, Shima stated he had laid it out with enough room left over that they could double the number of registers.{{sfn|Slater|2007|p=9}}