Editing Phase-locked loop (section)

==Further reading==
{{Commons category|Phase-locked loops}}
*{{Citation
 |first= Dean
 |last= Banerjee
 |url= http://www.ti.com/tool/pll_book
 |title= PLL Performance, Simulation and Design Handbook
 |edition= 4th
 |year= 2006
 |publisher= [[National Semiconductor]]
 |ref= none
 |access-date= 2012-12-04
 |archive-url= https://web.archive.org/web/20120902032009/http://www.ti.com/tool/pll_book
 |archive-date= 2012-09-02
 |url-status= dead
 }}.
*{{Citation
 |first= R. E.
 |last= Best
 |title= Phase-locked Loops: Design, Simulation and Applications
 |publisher= McGraw-Hill
 |year= 2003
 |isbn= 0-07-141201-8
 |ref=none}}
*{{Citation
 |first= Henri
 |last= de Bellescize
 |title= La réception Synchrone
 |journal= L'Onde Electrique
 |volume= 11
 |pages=230–240
 |date= June 1932
 |ref=none}}
*{{Citation
 |first= Richard C.
 |last= Dorf
 |title= The Electrical Engineering Handbook
 |publisher= CRC Press
 |location= Boca Raton
 |year= 1993
 |bibcode= 1993eeh..book.....D
 |isbn= 0-8493-0185-8
 |ref=none}}
*{{Citation
 |first= William F.
 |last=Egan
 |author-link=William F. Egan (electrical engineer)
 |title= Phase-Lock Basics
 |publisher= John Wiley & Sons
 |year= 1998
 |ref=none}}. (provides useful Matlab scripts for simulation)
*{{Citation
 |first= William F.
 |last= Egan
 |author-link=William F. Egan (electrical engineer)
 |title= Frequency Synthesis by Phase Lock
 |edition= 2nd
 |publisher= John Wiley and Sons
 |year= 2000
 |ref=none}}. (provides useful Matlab scripts for simulation)
*{{Citation
 |first= Floyd M.
 |last= Gardner
 |author-link= Floyd M. Gardner
 |title= Phaselock Techniques
 |edition= 3rd
 |publisher= Wiley-Interscience
 |year= 2005
 |isbn= 978-0-471-43063-6 |ref=none}}
*{{Citation
 |first1= J.
 |last1= Klapper
 |first2= J. T.
 |last2= Frankle
 |title= Phase-Locked and Frequency-Feedback Systems
 |publisher= Academic Press
 |year= 1972
 |ref=none}}. (FM Demodulation)
*{{Citation
 |title= Predicting the Phase Noise and Jitter of PLL-Based Frequency Synthesizers
 |edition= 4g
 |first= Ken
 |last= Kundert
 |date= August 2006
 |publisher= Designer's Guide Consulting, Inc.
 |url= http://www.designers-guide.org/Analysis/PLLnoise+jitter.pdf
 |ref=none}}
*{{Citation
 |first= Mingliang
 |last= Liu
 |title= Build a 1.5-V 2.4-GHz CMOS PLL
 |date= February 21, 2006
 |publisher= Wireless Net Design Line
 |url= http://www.wirelessnetdesignline.com/howto/180205535
 |ref= none
 |archive-url= https://web.archive.org/web/20100701082915/http://www.wirelessnetdesignline.com/howto/180205535
 |archive-date= July 1, 2010
 |url-status= dead
 }}. An article on designing a standard PLL IC for Bluetooth applications.
*{{Citation
 |first= Dan H.
 |last= Wolaver
 |title= Phase-Locked Loop Circuit Design
 |publisher= Prentice Hall
 |year= 1991
 |isbn= 0-13-662743-9
 |ref=none}}