Editing Serial Peripheral Interface (section)

=== Dual SPI ===
For instances where the full-duplex nature of SPI is not used, an extension uses both data pins in a half-duplex configuration to send two bits per clock cycle. Typically a command byte is sent requesting a response in dual mode, after which the MOSI line becomes SIO0 (serial I/O 0) and carries even bits, while the MISO line becomes SIO1 and carries odd bits. Data is still transmitted most-significant bit first, but SIO1 carries bits 7, 5, 3 and 1 of each byte, while SIO0 carries bits 6, 4, 2 and 0.

This is particularly popular among SPI ROMs, which have to send a large amount of data, and comes in two variants:<ref name="W25Q16JV">{{cite web |title=W25Q16JV 3V 16M-bit serial flash memory with Dual/Quad SPI |date=12 August 2016 |version=Revision D |publisher=[[Winbond]] |type=data sheet |url=https://www.winbond.com/resource-files/w25q16jv%20spi%20revd%2008122016.pdf |access-date=2017-02-10}}</ref><ref name="D25LQ64">{{cite web |title=D25LQ64 1.8V Uniform Sector Dual and Quad SPI Flash |type=data sheet |date=11 February 2011 |version=version 0.1 |publisher=GigaDevice |url=https://www.sst-ic.com/File/DataSheet/KC909742-1112151725544ed0c4ce-8225-4c46-8d18-b81422086247.pdf |archive-url=https://web.archive.org/web/20170212090900/http://www.sst-ic.com/File/DataSheet/KC909742-1112151725544ed0c4ce-8225-4c46-8d18-b81422086247.pdf |url-status=dead |archive-date=12 February 2017 |access-date=2017-02-10}}</ref>

* Dual read sends the command and address from the master in single mode, and returns the data in dual mode.
* Dual I/O sends the command in single mode, then sends the address and return data in dual mode.