Editing Synchronous dynamic random-access memory (section)

== Timeline ==
{{See also|Random-access memory#Timeline|Flash memory#Timeline|Transistor count#Memory}}{{Update section|date=December 2023|reason=Advances in DDR5 need to be included}}

=== SDRAM ===
<section begin="SDRAM timeline"/>
{| class="wikitable sortable" style="text-align:center; white-space:nowrap;"
|+ Synchronous dynamic random-access memory (SDRAM)
|-
! style="line-height:110%"|Date of<br>intro-<br>duction
! Chip<br>name
! Capacity<br>([[bit]]s){{binpre|first}}
! SDRAM<br>type
! Manufac-<br>turer(s)
! data-sort-type="number" |[[Semiconductor device fabrication|Pro-<br>cess]]
! [[MOSFET|MOS-<br>FET]]
! data-sort-type="number" | Area<br>(mm<sup>2</sup>)
! {{Abbr|Ref|Reference(s)}}
|-
|1992
|KM48SL2000
|16 [[Megabit|Mbit]]
|[[SDR SDRAM|SDR]]
|[[Samsung Electronics|Samsung]]
|style="color:#AAAAAA"| ''?''
|[[CMOS]]
|style="color:#AAAAAA"| ''?''
|<ref name="KM48SL2000">{{cite web |title=KM48SL2000-7 Datasheet |url=https://www.datasheetarchive.com/KM48SL2000-7-datasheet.html |publisher=[[Samsung]] |access-date=19 June 2019 |date=August 1992}}</ref><ref name="electronic-design"/>
|-
|rowspan="3" |1996
|MSM5718C50
|18 Mbit
|[[RDRAM]]
|[[Oki Electric Industry|Oki]]
|style="color:#AAAAAA"| ''?''
|CMOS
|325
|<ref name="oki-rdram">{{cite web |title=MSM5718C50/MD5764802 |url=https://retrocdn.net/images/c/c3/Oki_Concurrent_RDRAM_datasheet.pdf |archive-url=https://web.archive.org/web/20190621151518/https://retrocdn.net/images/c/c3/Oki_Concurrent_RDRAM_datasheet.pdf |archive-date=2019-06-21 |url-status=live |publisher=[[Oki Electric Industry|Oki Semiconductor]] |date=February 1999 |access-date=21 June 2019}}</ref>
|-
|[[Nintendo 64 technical specifications|N64 RDRAM]]
|36 Mbit
|RDRAM
|[[NEC]]
|style="color:#AAAAAA"| ''?''
|CMOS
|style="color:#AAAAAA"| ''?''
|<ref>{{cite magazine|title=Ultra 64 Tech Specs|magazine=[[Next Generation (magazine)|Next Generation]]|issue=14 |publisher=[[Imagine Media]] |date=February 1996|page=40}}</ref>
|-
|style="color:#AAAAAA"| ''?''
|1024 Mbit
|SDR
|[[Mitsubishi Electric|Mitsubishi]]
|[[180 nanometer|150&nbsp;nm]]
|CMOS
|style="color:#AAAAAA"| ''?''
|<ref name="stol">{{cite web|url=http://maltiel-consulting.com/Semiconductor_technology_memory.html|title=Memory|website=STOL (Semiconductor Technology Online)|access-date=25 June 2019}}</ref>
|-
|1997
|style="color:#AAAAAA"| ''?''
|1024 Mbit
|SDR
|[[Hyundai Electronics|Hyundai]]
|style="color:#AAAAAA"| ''?''
|[[Silicon on insulator|SOI]]
|style="color:#AAAAAA"| ''?''
|<ref name="hynix90s">{{cite web |title=History: 1990s |url=http://www.az5miao.com/history1990.html |access-date=4 April 2022 |website=az5miao}}</ref>
|-
|1998
|MD5764802
|64 Mbit
|RDRAM
|Oki
|style="color:#AAAAAA"| ''?''
|CMOS
|325
|<ref name="oki-rdram"/>
|-
|{{sort|1998|Mar&nbsp;1998}}
|Direct RDRAM
|72 Mbit
|RDRAM
|[[Rambus]]
|style="color:#AAAAAA"| ''?''
|CMOS
|style="color:#AAAAAA"| ''?''
|<ref>{{cite web |title=Direct RDRAM |url=https://retrocdn.net/images/6/68/Direct_RDRAM_datasheet.pdf |archive-url=https://web.archive.org/web/20190621151523/https://retrocdn.net/images/6/68/Direct_RDRAM_datasheet.pdf |archive-date=2019-06-21 |url-status=live |publisher=[[Rambus]] |date=12 March 1998 |access-date=21 June 2019}}</ref>
|-
|{{sort|1998|Jun&nbsp;1998}}
|style="color:#AAAAAA"| ''?''
|64 Mbit
|[[DDR SDRAM|DDR]]
|Samsung
|style="color:#AAAAAA"| ''?''
|CMOS
|style="color:#AAAAAA"| ''?''
|<ref name="samsung98">{{cite news |title=Samsung Electronics Comes Out with Super-Fast 16M DDR SGRAMs |url=https://www.samsung.com/semiconductor/insights/news-events/samsung-electronics-comes-out-with-super-fast-16m-ddr-sgrams/ |access-date=23 June 2019 |work=[[Samsung Electronics]] |publisher=[[Samsung]] |date=17 September 1998}}</ref><ref name="samsung99">{{cite news |title=Samsung Electronics Develops First 128Mb SDRAM with DDR/SDR Manufacturing Option |url=https://www.samsung.com/semiconductor/insights/news-events/samsung-electronics-develops-first-128mb-sdram-with-ddr-sdr-manufacturing-option/ |access-date=23 June 2019 |work=[[Samsung Electronics]] |publisher=[[Samsung]] |date=10 February 1999}}</ref><ref name="phys">{{cite news |title=Samsung Demonstrates World's First DDR 3 Memory Prototype |url=https://phys.org/news/2005-02-samsung-world-ddr-memory-prototype.html |access-date=23 June 2019 |work=[[Phys.org]] |date=17 February 2005 |language=en-us}}</ref>
|-
| rowspan="2" |1998
| rowspan="2" style="color:#AAAAAA"| ''?''
|64 Mbit
|DDR
|Hyundai
|style="color:#AAAAAA"| ''?''
|CMOS
|style="color:#AAAAAA"| ''?''
|<ref name="hynix90s"/>
|-
|128 Mbit
|SDR
|Samsung
|style="color:#AAAAAA"| ''?''
|CMOS
|style="color:#AAAAAA"| ''?''
|<ref name="samsung-history">{{cite web |title=History |url=https://www.samsung.com/us/aboutsamsung/company/history/ |website=[[Samsung Electronics]] |publisher=[[Samsung]] |access-date=19 June 2019}}</ref><ref name="samsung99"/>
|-
| rowspan="2" |1999
| rowspan="2" style="color:#AAAAAA"| ''?''
|128 Mbit
|DDR
|Samsung
|style="color:#AAAAAA"| ''?''
|CMOS
|style="color:#AAAAAA"| ''?''
|<ref name="samsung99"/>
|-
|1024 Mbit
|DDR
|Samsung
|[[130 nanometer|140 nm]]
|CMOS
|style="color:#AAAAAA"| ''?''
|<ref name="stol"/>
|-
|2000
|[[PlayStation 2 technical specifications|GS eDRAM]]
|32 Mbit
|[[eDRAM]]
|[[Sony]], [[Toshiba]]
|[[180 nm]]
|CMOS
|279
|<ref name="sony2003">{{cite news |title=EMOTION ENGINE AND GRAPHICS SYNTHESIZER USED IN THE CORE OF PLAYSTATION BECOME ONE CHIP |url=https://www.sie.com/content/dam/corporate/en/corporate/release/pdf/030421be.pdf |archive-url=https://web.archive.org/web/20170227150247/https://www.sie.com/content/dam/corporate/en/corporate/release/pdf/030421be.pdf |archive-date=2017-02-27 |url-status=live |access-date=26 June 2019 |publisher=[[Sony]] |date=April 21, 2003}}</ref>
|-
| rowspan="2" |2001
| rowspan="2" style="color:#AAAAAA"| ''?''
|288 Mbit
|RDRAM
|Hynix
|style="color:#AAAAAA"| ''?''
|CMOS
|style="color:#AAAAAA"| ''?''
|<ref name="hynix2000s">{{cite web |title=History: 2000s |url=http://www.az5miao.com/history2000.html |access-date=4 April 2022 |website=az5miao}}</ref>
|-
|style="color:#AAAAAA"| ''?''
|[[DDR2 SDRAM|DDR2]]
|Samsung
|[[100 nm]]
|CMOS
|style="color:#AAAAAA"| ''?''
|<ref name="phys"/><ref name="stol"/>
|-
|2002
|style="color:#AAAAAA"| ''?''
|256 Mbit
|SDR
|Hynix
|style="color:#AAAAAA"| ''?''
|CMOS
|style="color:#AAAAAA"| ''?''
|<ref name="hynix2000s"/>
|-
| rowspan="5" |2003
|[[PlayStation 2 technical specifications|EE+GS eDRAM]]
|32 Mbit
|eDRAM
|Sony, Toshiba
|[[90 nm]]
|CMOS
|{{0}}86
|<ref name="sony2003"/>
|-
| rowspan="4" style="color:#AAAAAA"| ''?''
|72 Mbit
|[[DDR3]]
|Samsung
|90&nbsp;nm
|CMOS
|style="color:#AAAAAA"| ''?''
|<ref>{{cite news |title=Samsung Develops the Industry's Fastest DDR3 SRAM for High Performance EDP and Network Applications |url=https://www.samsung.com/semiconductor/insights/news-events/samsung-develops-the-industrys-fastest-ddr3-sram-for-high-performance-edp-and-network-applications/ |access-date=25 June 2019 |work=[[Samsung Semiconductor]] |publisher=[[Samsung]] |date=29 January 2003}}</ref>
|-
| rowspan="2" |512 Mbit
| rowspan="2" |DDR2
|Hynix
|style="color:#AAAAAA"| ''?''
|CMOS
|style="color:#AAAAAA"| ''?''
|<ref name="hynix2000s"/>
|-
|[[Elpida Memory|Elpida]]
|[[110 nanometer|110 nm]]
|CMOS
|style="color:#AAAAAA"| ''?''
|<ref>{{cite news |title=Elpida ships 2GB DDR2 modules |url=https://www.theinquirer.net/inquirer/news/1044210/elpida-ships-2gb-ddr2-modules |archive-url=https://web.archive.org/web/20190710115030/https://www.theinquirer.net/inquirer/news/1044210/elpida-ships-2gb-ddr2-modules |url-status=unfit |archive-date=July 10, 2019 |access-date=25 June 2019 |work=[[The Inquirer]] |date=4 November 2003}}</ref>
|-
|1024 Mbit
|DDR2
|Hynix
|style="color:#AAAAAA"| ''?''
|CMOS
|style="color:#AAAAAA"| ''?''
|<ref name="hynix2000s"/>
|-
|2004
|style="color:#AAAAAA"| ''?''
|2048 Mbit
|DDR2
|Samsung
|80&nbsp;nm
|CMOS
|style="color:#AAAAAA"| ''?''
|<ref name="samsung2004">{{cite news |title=Samsung Shows Industry's First 2-Gigabit DDR2 SDRAM |url=https://www.samsung.com/semiconductor/insights/news-events/samsung-shows-industrys-first-2-gigabit-ddr2-sdram/ |access-date=25 June 2019 |work=[[Samsung Semiconductor]] |publisher=[[Samsung]] |date=20 September 2004}}</ref>
|-
| rowspan="3" |2005
|[[PlayStation 2 technical specifications|EE+GS eDRAM]]
|32 Mbit
|eDRAM
|Sony, Toshiba
|[[65 nm]]
|CMOS
|{{0}}86
|<ref name="impress">{{cite web|url=https://pc.watch.impress.co.jp/docs/2003/0421/sony1.htm|title=ソニー、65nm対応の半導体設備を導入。3年間で2,000億円の投資|website=pc.watch.impress.co.jp|url-status=live|archive-url=https://web.archive.org/web/20160813020249/http://pc.watch.impress.co.jp/docs/2003/0421/sony1.htm|archive-date=2016-08-13}}</ref>
|-
|[[Xenos (graphics chip)|Xenos eDRAM]]
|80 Mbit
|eDRAM
|NEC
|90&nbsp;nm
|CMOS
|style="color:#AAAAAA"| ''?''
|<ref>ATI engineers by way of Beyond 3D's Dave Baumann</ref>
|-
|style="color:#AAAAAA"| ''?''
|512 Mbit
|DDR3
|Samsung
|80&nbsp;nm
|CMOS
|style="color:#AAAAAA"| ''?''
|<ref name="phys"/><ref name="samsung2000s">{{cite web |title=Our Proud Heritage from 2000 to 2009 |url=https://www.samsung.com/semiconductor/about-us/history-03/ |website=[[Samsung Semiconductor]] |publisher=[[Samsung]] |access-date=25 June 2019}}</ref>
|-
|2006
|style="color:#AAAAAA"| ''?''
|1024 Mbit
|DDR2
|Hynix
|60&nbsp;nm
|rowspan="2" | CMOS
|rowspan="2" style="color:#AAAAAA"| ''?''
|rowspan="2" | <ref name="hynix2000s"/>
|-
|2008
|style="color:#AAAAAA"| ''?''
|style="color:#AAAAAA"| ''?''
|[[LPDDR2]]
|Hynix
|style="color:#AAAAAA"| ''?''
|-
|{{sort|2008|Apr&nbsp;2008}}
|style="color:#AAAAAA"| ''?''
|8192 Mbit
|DDR3
|Samsung
|50&nbsp;nm
|CMOS
|style="color:#AAAAAA"| ''?''
|rowspan="2" | <ref>{{cite news |title=Samsung 50nm 2GB DDR3 chips are industry's smallest |url=https://www.slashgear.com/samsung-50nm-2gb-ddr3-chips-are-industrys-smallest-2917676/ |access-date=25 June 2019 |work=SlashGear |date=29 September 2008}}</ref>
|-
|2008
|style="color:#AAAAAA"| ''?''
|16384 Mbit
|DDR3
|Samsung
|50&nbsp;nm
|CMOS
|style="color:#AAAAAA"| ''?''
|-
| rowspan="2" |2009
| rowspan="2" style="color:#AAAAAA"| ''?''
|style="color:#AAAAAA"| ''?''
|DDR3
|Hynix
|[[45 nanometer|44 nm]]
|rowspan="2" | CMOS
|rowspan="2" style="color:#AAAAAA"| ''?''
|rowspan="2" | <ref name="hynix2000s"/>
|-
|2048 Mbit
|DDR3
|Hynix
|[[40 nanometer|40 nm]]
|-
| rowspan="2" |2011
| rowspan="2" style="color:#AAAAAA"| ''?''
|16384 Mbit
|DDR3
|Hynix
|40&nbsp;nm
|CMOS
|style="color:#AAAAAA"| ''?''
|<ref name="hynix2010s">{{cite web |title=History: 2010s |url=http://www.az5miao.com/history2010.html |website=az5miao |access-date=4 April 2022}}</ref>
|-
|2048 Mbit
|[[DDR4]]
|Hynix
|[[32 nanometer|30&nbsp;nm]]
|CMOS
|style="color:#AAAAAA"| ''?''
|<ref name="hynix2010s"/>
|-
|2013
|style="color:#AAAAAA"| ''?''
|style="color:#AAAAAA"| ''?''
|[[LPDDR4]]
|Samsung
|[[20 nm]]
|CMOS
|style="color:#AAAAAA"| ''?''
|<ref name="hynix2010s"/>
|-
|2014
|style="color:#AAAAAA"| ''?''
|8192 Mbit
|LPDDR4
|Samsung
|20&nbsp;nm
|CMOS
|style="color:#AAAAAA"| ''?''
|<ref>{{cite web |title=Our Proud Heritage from 2010 to Now |url=https://www.samsung.com/semiconductor/about-us/history-04/ |website=[[Samsung Semiconductor]] |publisher=[[Samsung]] |access-date=25 June 2019}}</ref>
|-
|2015
|style="color:#AAAAAA"| ''?''
|12 Gbit
|LPDDR4
|Samsung
|20&nbsp;nm
|CMOS
|style="color:#AAAAAA"| ''?''
|<ref name="samsung-history"/>
|-
| rowspan="2" |2018
| rowspan="2" style="color:#AAAAAA"| ''?''
|8192 Mbit
|[[LPDDR#LP-DDR5|LPDDR5]]
|Samsung
|[[10 nm process|10 nm]]
|[[FinFET]]
|style="color:#AAAAAA"| ''?''
|<ref>{{cite news |title=Samsung Electronics Announces Industry's First 8Gb LPDDR5 DRAM for 5G and AI-powered Mobile Applications |url=https://news.samsung.com/global/samsung-electronics-announces-industrys-first-8gb-lpddr5-dram-for-5g-and-ai-powered-mobile-applications |access-date=8 July 2019 |publisher=[[Samsung]] |date=July 17, 2018}}</ref>
|-
|128 Gbit
|DDR4
|Samsung
|10&nbsp;nm
|FinFET
|style="color:#AAAAAA"| ''?''
|<ref>{{cite news |date=6 September 2018 |title=Samsung Unleashes a Roomy DDR4 256GB RAM |work=[[Tom's Hardware]] |url=https://www.tomshardware.co.uk/samsung-256gb-ddr4-ram,news-59123.html |url-status=dead |access-date=4 April 2022 |archive-url=https://web.archive.org/web/20190621205106if_/https://www.tomshardware.co.uk/samsung-256gb-ddr4-ram,news-59123.html |archive-date=June 21, 2019}}</ref>
|}

=== SGRAM ===
{| class="wikitable sortable" style="text-align:center"
|+ [[Synchronous graphics random-access memory]] (SGRAM)
|-
! Date of introduction
! Chip name
! Capacity ([[bit]]s){{binpre}}
! SDRAM type
! Manufacturer(s)
! data-sort-type="number" |[[Semiconductor device fabrication|Process]]
! [[MOSFET]]
! data-sort-type="number" | Area
! {{Abbr|Ref|Reference(s)}}
|-
|{{sort|1994|November 1994}}
|HM5283206
|8 Mbit
|[[SGRAM]] ([[SDR SDRAM|SDR]])
|[[Hitachi]]
|[[350 nm]]
|[[CMOS]]
|58&nbsp;mm<sup>2</sup>
|<ref name="HM5283206">{{cite book |title=HM5283206 Datasheet |url=https://www.datasheetarchive.com/pdf/download.php?id=d740571591400628c124d16f943c9f96145441&type=M&term=HM5283206 |publisher=[[Hitachi]] |date=11 November 1994 |access-date=10 July 2019}}</ref><ref>{{cite web |title=Hitachi HM5283206FP10 8Mbit SGRAM |url=http://smithsonianchips.si.edu/ice/cd/9702_529.pdf |archive-url=https://web.archive.org/web/20030716101100/http://smithsonianchips.si.edu/ice/cd/9702_529.pdf |archive-date=2003-07-16 |url-status=live |website=[[Smithsonian Institution]] |access-date=10 July 2019}}</ref>
|-
|{{sort|1994|December 1994}}
|μPD481850
|8 Mbit
|SGRAM (SDR)
|[[NEC]]
|{{?}}
|CMOS
|280&nbsp;mm<sup>2</sup>
|<ref name="D481850">{{cite book |title=μPD481850 Datasheet |url=https://www.datasheetarchive.com/pdf/download.php?id=96dd7345eb44f58adee424725f8fa65f48c794&type=O |publisher=[[NEC]] |date=6 December 1994 |access-date=10 July 2019}}</ref><ref name="nec1995">{{cite book |title=NEC Application Specific Memory |date=Fall 1995 |publisher=[[NEC]] |page=[https://archive.org/details/bitsavers_necdataBoonSpecificMemory_23148799/page/n365 359] |url=https://archive.org/details/bitsavers_necdataBoonSpecificMemory_23148799 |access-date=21 June 2019}}</ref>
|-
|1997
|μPD4811650
|16 Mbit
|SGRAM (SDR)
|NEC
|350&nbsp;nm
|CMOS
|280&nbsp;mm<sup>2</sup>
|<ref>{{cite book |title=UPD4811650 Datasheet |url=https://www.datasheetarchive.com/pdf/download.php?id=74d301b62a3253e6f3e4ff722cad1e9cb1ac90&type=P |publisher=[[NEC]] |date=December 1997 |access-date=10 July 2019}}</ref><ref>{{cite journal |last1=Takeuchi |first1=Kei |title=16M-BIT SYNCHRONOUS GRAPHICS RAM: μPD4811650 |journal=NEC Device Technology International |date=1998 |issue=48 |url=https://www.datasheetarchive.com/pdf/download.php?id=5fde91b774d1f298423c9d3ae6982f843a4df7&type=P |access-date=10 July 2019}}</ref>
|-
|{{sort|1998|September 1998}}
|{{?}}
|16 Mbit
|SGRAM ([[GDDR]])
|[[Samsung Electronics|Samsung]]
|{{?}}
|CMOS
|{{?}}
|<ref name="samsung98"/>
|-
|1999
|KM4132G112
|32 Mbit
|SGRAM (SDR)
|Samsung
|{{?}}
|CMOS
|280&nbsp;mm<sup>2</sup>
|<ref>{{cite news |title=Samsung Announces the World's First 222 MHz 32Mbit SGRAM for 3D Graphics and Networking Applications |url=https://www.samsung.com/semiconductor/insights/news-events/samsung-announces-the-worlds-first-222-mhz-32mbit-sgram-for-3d-graphics-and-networking-application/ |access-date=10 July 2019 |work=[[Samsung Semiconductor]] |publisher=[[Samsung]] |date=12 July 1999}}</ref>
|-
|2002
|{{?}}
|128 Mbit
|SGRAM ([[GDDR2]])
|Samsung
|{{?}}
|CMOS
|{{?}}
|<ref name="samsung2003">{{cite news |title=Samsung Electronics Announces JEDEC-Compliant 256Mb GDDR2 for 3D Graphics |url=https://www.samsung.com/semiconductor/insights/news-events/samsung-electronics-announces-jedec-compliant-256mb-gddr2-for-3d-graphics/ |access-date=26 June 2019 |work=[[Samsung Electronics]] |publisher=[[Samsung]] |date=28 August 2003}}</ref>
|-
|rowspan="2" | 2003
|rowspan="2" | {{?}}
|rowspan="2" | 256 Mbit
|SGRAM (GDDR2)
|rowspan="2" | Samsung
|rowspan="2" | {{?}}
|rowspan="2" | CMOS
|rowspan="2" | {{?}}
|rowspan="2" | <ref name="samsung2003"/>
|-
|SGRAM ([[GDDR3]])
|-
|{{sort|2005|March 2005}}
|K4D553238F
|256 Mbit
|SGRAM (GDDR)
|Samsung
|{{?}}
|CMOS
|77&nbsp;mm<sup>2</sup>
|<ref>{{cite web |title=K4D553238F Datasheet |url=https://www.datasheetarchive.com/pdf/download.php?id=cbbd25bf58d1232267a54268161c1af804dc2f&type=P |publisher=[[Samsung Electronics]] |date=March 2005 |access-date=10 July 2019}}</ref>
|-
|{{sort|2005|October 2005}}
|{{?}}
|256 Mbit
|SGRAM ([[GDDR4]])
|Samsung
|{{?}}
|CMOS
|{{?}}
|<ref>{{cite web |title=Samsung Electronics Develops Industry's First Ultra-Fast GDDR4 Graphics DRAM |url=https://www.samsung.com/semiconductor/insights/news-events/samsung-electronics-develops-industrys-first-ultra-fast-gddr4-graphics-dram/ |website=[[Samsung Semiconductor]] |publisher=[[Samsung]] |access-date=8 July 2019 |date=October 26, 2005}}</ref>
|-
|2005
|{{?}}
|512 Mbit
|SGRAM (GDDR4)
|[[Hynix]]
|{{?}}
|rowspan="3" | CMOS
|rowspan="3" | {{?}}
|rowspan="3" | <ref name="hynix2000s"/>
|-
|2007
|{{?}}
|1024 Mbit
|SGRAM ([[GDDR5]])
|Hynix
|[[65 nanometer|60&nbsp;nm]]
|-
|2009
|{{?}}
|2048 Mbit
|SGRAM (GDDR5)
|Hynix
|[[45 nanometer|40&nbsp;nm]]
|-
|2010
|K4W1G1646G
|1024 Mbit
|SGRAM (GDDR3)
|Samsung
|{{?}}
|CMOS
|100&nbsp;mm<sup>2</sup>
|<ref>{{cite web |title=K4W1G1646G-BC08 Datasheet |url=https://www.datasheet.directory/index.php?title=Special:PdfViewer&url=https%3A%2F%2Fdatasheet.iiic.cc%2Fdatasheets-1%2Fsamsung_semiconductor_division%2FK4W1G1646G-BC08.pdf |archive-url=https://web.archive.org/web/20220124234650/https://datasheet.iiic.cc/datasheets-1/samsung_semiconductor_division/K4W1G1646G-BC08.pdf |archive-date=2022-01-24 |url-status=live |publisher=[[Samsung Electronics]] |date=November 2010 |access-date=10 July 2019}}</ref>
|-
|2012
|{{?}}
|4096 Mbit
|SGRAM (GDDR3)
| [[SK Hynix]]
| {{?}}
| CMOS
| {{?}}
| <ref name="hynix2010s"/>
|-
|{{sort|2016|March 2016}}
|MT58K256M32JA
|8 Gbit
|SGRAM ([[GDDR5X]])
|[[Micron Technology|Micron]]
|20&nbsp;nm
|CMOS
|140&nbsp;mm<sup>2</sup>
|<ref>{{cite news |last1=Shilov |first1=Anton |title=Micron Begins to Sample GDDR5X Memory, Unveils Specs of Chips |url=https://www.anandtech.com/show/10193/micron-begins-to-sample-gddr5x-memory |access-date=16 July 2019 |work=[[AnandTech]] |date=March 29, 2016}}</ref>
|-
|{{sort|2018|January 2018}}
|K4ZAF325BM
|16 Gbit
|SGRAM ([[GDDR6]])
|Samsung
|[[10 nm process|10 nm]]
|[[FinFET]]
|225&nbsp;mm<sup>2</sup>
|<ref>{{cite news |title=Samsung Electronics Starts Producing Industry's First 16-Gigabit GDDR6 for Advanced Graphics Systems |url=https://news.samsung.com/global/samsung-electronics-starts-producing-industrys-first-16-gigabit-gddr6-for-advanced-graphics-systems |access-date=15 July 2019 |publisher=[[Samsung]] |date=January 18, 2018}}</ref><ref name='tr_gddr6'>{{cite news|last1=Killian|first1=Zak|title=Samsung fires up its foundries for mass production of GDDR6 memory|url=https://techreport.com/news/33129/samsung-fires-up-its-foundries-for-mass-production-of-gddr6-memory|access-date=18 January 2018|publisher=Tech Report|date=18 January 2018}}</ref><ref>{{cite news |title=Samsung Begins Producing The Fastest GDDR6 Memory In The World |url=https://wccftech.com/samsung-gddr6-16gb-18gbps-mass-production-official/ |access-date=16 July 2019 |work=Wccftech |date=18 January 2018}}</ref>
|} <section end="SDRAM timeline"/>

=== HBM ===
{| class="wikitable sortable" style="text-align:center"
|+ [[High Bandwidth Memory]] (HBM)
|-
! Date of introduction
! Chip name
! Capacity ([[bit]]s){{binpre}}
! SDRAM type
! Manufacturer(s)
! data-sort-type="number" |[[Semiconductor device fabrication|Process]]
! [[MOSFET]]
! data-sort-type="number" | Area
! {{Abbr|Ref|Reference(s)}}
|-
|2013
|{{?}}
|{{?}}
|[[High Bandwidth Memory|HBM]]
|[[SK Hynix]]
|{{?}}
|CMOS
|{{?}}
|<ref name="hynix2010s" />
|-
|{{sort|2016|June 2016}}
|{{?}}
|32 Gbit
|[[HBM2]]
|Samsung
|[[20 nm]]
|CMOS
|{{?}}
|<ref name="Shilov2017">{{cite news |last1=Shilov |first1=Anton |date=July 19, 2017 |title=Samsung Increases Production Volumes of 8 GB HBM2 Chips Due to Growing Demand |url=https://www.anandtech.com/show/11643/samsung-increases-8gb-hbm2-production-volume |access-date=29 June 2019 |work=[[AnandTech]]}}</ref><ref>{{cite web |title=HBM |url=https://samsungsemiconductor-us.com/hbm/ |access-date=16 July 2019 |website=[[Samsung Semiconductor]] |publisher=[[Samsung]]}}</ref>
|-
|2017
|{{?}}
|64 Gbit
|HBM2
|Samsung
|20&nbsp;nm
|CMOS
|{{?}}
|<ref name="Shilov2017" />
|}