Editing Synchronous dynamic random-access memory (section)

=== SDRAM ===
<section begin="SDRAM timeline"/>
{| class="wikitable sortable" style="text-align:center; white-space:nowrap;"
|+ Synchronous dynamic random-access memory (SDRAM)
|-
! style="line-height:110%"|Date of<br>intro-<br>duction
! Chip<br>name
! Capacity<br>([[bit]]s){{binpre|first}}
! SDRAM<br>type
! Manufac-<br>turer(s)
! data-sort-type="number" |[[Semiconductor device fabrication|Pro-<br>cess]]
! [[MOSFET|MOS-<br>FET]]
! data-sort-type="number" | Area<br>(mm<sup>2</sup>)
! {{Abbr|Ref|Reference(s)}}
|-
|1992
|KM48SL2000
|16 [[Megabit|Mbit]]
|[[SDR SDRAM|SDR]]
|[[Samsung Electronics|Samsung]]
|style="color:#AAAAAA"| ''?''
|[[CMOS]]
|style="color:#AAAAAA"| ''?''
|<ref name="KM48SL2000">{{cite web |title=KM48SL2000-7 Datasheet |url=https://www.datasheetarchive.com/KM48SL2000-7-datasheet.html |publisher=[[Samsung]] |access-date=19 June 2019 |date=August 1992}}</ref><ref name="electronic-design"/>
|-
|rowspan="3" |1996
|MSM5718C50
|18 Mbit
|[[RDRAM]]
|[[Oki Electric Industry|Oki]]
|style="color:#AAAAAA"| ''?''
|CMOS
|325
|<ref name="oki-rdram">{{cite web |title=MSM5718C50/MD5764802 |url=https://retrocdn.net/images/c/c3/Oki_Concurrent_RDRAM_datasheet.pdf |archive-url=https://web.archive.org/web/20190621151518/https://retrocdn.net/images/c/c3/Oki_Concurrent_RDRAM_datasheet.pdf |archive-date=2019-06-21 |url-status=live |publisher=[[Oki Electric Industry|Oki Semiconductor]] |date=February 1999 |access-date=21 June 2019}}</ref>
|-
|[[Nintendo 64 technical specifications|N64 RDRAM]]
|36 Mbit
|RDRAM
|[[NEC]]
|style="color:#AAAAAA"| ''?''
|CMOS
|style="color:#AAAAAA"| ''?''
|<ref>{{cite magazine|title=Ultra 64 Tech Specs|magazine=[[Next Generation (magazine)|Next Generation]]|issue=14 |publisher=[[Imagine Media]] |date=February 1996|page=40}}</ref>
|-
|style="color:#AAAAAA"| ''?''
|1024 Mbit
|SDR
|[[Mitsubishi Electric|Mitsubishi]]
|[[180 nanometer|150&nbsp;nm]]
|CMOS
|style="color:#AAAAAA"| ''?''
|<ref name="stol">{{cite web|url=http://maltiel-consulting.com/Semiconductor_technology_memory.html|title=Memory|website=STOL (Semiconductor Technology Online)|access-date=25 June 2019}}</ref>
|-
|1997
|style="color:#AAAAAA"| ''?''
|1024 Mbit
|SDR
|[[Hyundai Electronics|Hyundai]]
|style="color:#AAAAAA"| ''?''
|[[Silicon on insulator|SOI]]
|style="color:#AAAAAA"| ''?''
|<ref name="hynix90s">{{cite web |title=History: 1990s |url=http://www.az5miao.com/history1990.html |access-date=4 April 2022 |website=az5miao}}</ref>
|-
|1998
|MD5764802
|64 Mbit
|RDRAM
|Oki
|style="color:#AAAAAA"| ''?''
|CMOS
|325
|<ref name="oki-rdram"/>
|-
|{{sort|1998|Mar&nbsp;1998}}
|Direct RDRAM
|72 Mbit
|RDRAM
|[[Rambus]]
|style="color:#AAAAAA"| ''?''
|CMOS
|style="color:#AAAAAA"| ''?''
|<ref>{{cite web |title=Direct RDRAM |url=https://retrocdn.net/images/6/68/Direct_RDRAM_datasheet.pdf |archive-url=https://web.archive.org/web/20190621151523/https://retrocdn.net/images/6/68/Direct_RDRAM_datasheet.pdf |archive-date=2019-06-21 |url-status=live |publisher=[[Rambus]] |date=12 March 1998 |access-date=21 June 2019}}</ref>
|-
|{{sort|1998|Jun&nbsp;1998}}
|style="color:#AAAAAA"| ''?''
|64 Mbit
|[[DDR SDRAM|DDR]]
|Samsung
|style="color:#AAAAAA"| ''?''
|CMOS
|style="color:#AAAAAA"| ''?''
|<ref name="samsung98">{{cite news |title=Samsung Electronics Comes Out with Super-Fast 16M DDR SGRAMs |url=https://www.samsung.com/semiconductor/insights/news-events/samsung-electronics-comes-out-with-super-fast-16m-ddr-sgrams/ |access-date=23 June 2019 |work=[[Samsung Electronics]] |publisher=[[Samsung]] |date=17 September 1998}}</ref><ref name="samsung99">{{cite news |title=Samsung Electronics Develops First 128Mb SDRAM with DDR/SDR Manufacturing Option |url=https://www.samsung.com/semiconductor/insights/news-events/samsung-electronics-develops-first-128mb-sdram-with-ddr-sdr-manufacturing-option/ |access-date=23 June 2019 |work=[[Samsung Electronics]] |publisher=[[Samsung]] |date=10 February 1999}}</ref><ref name="phys">{{cite news |title=Samsung Demonstrates World's First DDR 3 Memory Prototype |url=https://phys.org/news/2005-02-samsung-world-ddr-memory-prototype.html |access-date=23 June 2019 |work=[[Phys.org]] |date=17 February 2005 |language=en-us}}</ref>
|-
| rowspan="2" |1998
| rowspan="2" style="color:#AAAAAA"| ''?''
|64 Mbit
|DDR
|Hyundai
|style="color:#AAAAAA"| ''?''
|CMOS
|style="color:#AAAAAA"| ''?''
|<ref name="hynix90s"/>
|-
|128 Mbit
|SDR
|Samsung
|style="color:#AAAAAA"| ''?''
|CMOS
|style="color:#AAAAAA"| ''?''
|<ref name="samsung-history">{{cite web |title=History |url=https://www.samsung.com/us/aboutsamsung/company/history/ |website=[[Samsung Electronics]] |publisher=[[Samsung]] |access-date=19 June 2019}}</ref><ref name="samsung99"/>
|-
| rowspan="2" |1999
| rowspan="2" style="color:#AAAAAA"| ''?''
|128 Mbit
|DDR
|Samsung
|style="color:#AAAAAA"| ''?''
|CMOS
|style="color:#AAAAAA"| ''?''
|<ref name="samsung99"/>
|-
|1024 Mbit
|DDR
|Samsung
|[[130 nanometer|140 nm]]
|CMOS
|style="color:#AAAAAA"| ''?''
|<ref name="stol"/>
|-
|2000
|[[PlayStation 2 technical specifications|GS eDRAM]]
|32 Mbit
|[[eDRAM]]
|[[Sony]], [[Toshiba]]
|[[180 nm]]
|CMOS
|279
|<ref name="sony2003">{{cite news |title=EMOTION ENGINE AND GRAPHICS SYNTHESIZER USED IN THE CORE OF PLAYSTATION BECOME ONE CHIP |url=https://www.sie.com/content/dam/corporate/en/corporate/release/pdf/030421be.pdf |archive-url=https://web.archive.org/web/20170227150247/https://www.sie.com/content/dam/corporate/en/corporate/release/pdf/030421be.pdf |archive-date=2017-02-27 |url-status=live |access-date=26 June 2019 |publisher=[[Sony]] |date=April 21, 2003}}</ref>
|-
| rowspan="2" |2001
| rowspan="2" style="color:#AAAAAA"| ''?''
|288 Mbit
|RDRAM
|Hynix
|style="color:#AAAAAA"| ''?''
|CMOS
|style="color:#AAAAAA"| ''?''
|<ref name="hynix2000s">{{cite web |title=History: 2000s |url=http://www.az5miao.com/history2000.html |access-date=4 April 2022 |website=az5miao}}</ref>
|-
|style="color:#AAAAAA"| ''?''
|[[DDR2 SDRAM|DDR2]]
|Samsung
|[[100 nm]]
|CMOS
|style="color:#AAAAAA"| ''?''
|<ref name="phys"/><ref name="stol"/>
|-
|2002
|style="color:#AAAAAA"| ''?''
|256 Mbit
|SDR
|Hynix
|style="color:#AAAAAA"| ''?''
|CMOS
|style="color:#AAAAAA"| ''?''
|<ref name="hynix2000s"/>
|-
| rowspan="5" |2003
|[[PlayStation 2 technical specifications|EE+GS eDRAM]]
|32 Mbit
|eDRAM
|Sony, Toshiba
|[[90 nm]]
|CMOS
|{{0}}86
|<ref name="sony2003"/>
|-
| rowspan="4" style="color:#AAAAAA"| ''?''
|72 Mbit
|[[DDR3]]
|Samsung
|90&nbsp;nm
|CMOS
|style="color:#AAAAAA"| ''?''
|<ref>{{cite news |title=Samsung Develops the Industry's Fastest DDR3 SRAM for High Performance EDP and Network Applications |url=https://www.samsung.com/semiconductor/insights/news-events/samsung-develops-the-industrys-fastest-ddr3-sram-for-high-performance-edp-and-network-applications/ |access-date=25 June 2019 |work=[[Samsung Semiconductor]] |publisher=[[Samsung]] |date=29 January 2003}}</ref>
|-
| rowspan="2" |512 Mbit
| rowspan="2" |DDR2
|Hynix
|style="color:#AAAAAA"| ''?''
|CMOS
|style="color:#AAAAAA"| ''?''
|<ref name="hynix2000s"/>
|-
|[[Elpida Memory|Elpida]]
|[[110 nanometer|110 nm]]
|CMOS
|style="color:#AAAAAA"| ''?''
|<ref>{{cite news |title=Elpida ships 2GB DDR2 modules |url=https://www.theinquirer.net/inquirer/news/1044210/elpida-ships-2gb-ddr2-modules |archive-url=https://web.archive.org/web/20190710115030/https://www.theinquirer.net/inquirer/news/1044210/elpida-ships-2gb-ddr2-modules |url-status=unfit |archive-date=July 10, 2019 |access-date=25 June 2019 |work=[[The Inquirer]] |date=4 November 2003}}</ref>
|-
|1024 Mbit
|DDR2
|Hynix
|style="color:#AAAAAA"| ''?''
|CMOS
|style="color:#AAAAAA"| ''?''
|<ref name="hynix2000s"/>
|-
|2004
|style="color:#AAAAAA"| ''?''
|2048 Mbit
|DDR2
|Samsung
|80&nbsp;nm
|CMOS
|style="color:#AAAAAA"| ''?''
|<ref name="samsung2004">{{cite news |title=Samsung Shows Industry's First 2-Gigabit DDR2 SDRAM |url=https://www.samsung.com/semiconductor/insights/news-events/samsung-shows-industrys-first-2-gigabit-ddr2-sdram/ |access-date=25 June 2019 |work=[[Samsung Semiconductor]] |publisher=[[Samsung]] |date=20 September 2004}}</ref>
|-
| rowspan="3" |2005
|[[PlayStation 2 technical specifications|EE+GS eDRAM]]
|32 Mbit
|eDRAM
|Sony, Toshiba
|[[65 nm]]
|CMOS
|{{0}}86
|<ref name="impress">{{cite web|url=https://pc.watch.impress.co.jp/docs/2003/0421/sony1.htm|title=ソニー、65nm対応の半導体設備を導入。3年間で2,000億円の投資|website=pc.watch.impress.co.jp|url-status=live|archive-url=https://web.archive.org/web/20160813020249/http://pc.watch.impress.co.jp/docs/2003/0421/sony1.htm|archive-date=2016-08-13}}</ref>
|-
|[[Xenos (graphics chip)|Xenos eDRAM]]
|80 Mbit
|eDRAM
|NEC
|90&nbsp;nm
|CMOS
|style="color:#AAAAAA"| ''?''
|<ref>ATI engineers by way of Beyond 3D's Dave Baumann</ref>
|-
|style="color:#AAAAAA"| ''?''
|512 Mbit
|DDR3
|Samsung
|80&nbsp;nm
|CMOS
|style="color:#AAAAAA"| ''?''
|<ref name="phys"/><ref name="samsung2000s">{{cite web |title=Our Proud Heritage from 2000 to 2009 |url=https://www.samsung.com/semiconductor/about-us/history-03/ |website=[[Samsung Semiconductor]] |publisher=[[Samsung]] |access-date=25 June 2019}}</ref>
|-
|2006
|style="color:#AAAAAA"| ''?''
|1024 Mbit
|DDR2
|Hynix
|60&nbsp;nm
|rowspan="2" | CMOS
|rowspan="2" style="color:#AAAAAA"| ''?''
|rowspan="2" | <ref name="hynix2000s"/>
|-
|2008
|style="color:#AAAAAA"| ''?''
|style="color:#AAAAAA"| ''?''
|[[LPDDR2]]
|Hynix
|style="color:#AAAAAA"| ''?''
|-
|{{sort|2008|Apr&nbsp;2008}}
|style="color:#AAAAAA"| ''?''
|8192 Mbit
|DDR3
|Samsung
|50&nbsp;nm
|CMOS
|style="color:#AAAAAA"| ''?''
|rowspan="2" | <ref>{{cite news |title=Samsung 50nm 2GB DDR3 chips are industry's smallest |url=https://www.slashgear.com/samsung-50nm-2gb-ddr3-chips-are-industrys-smallest-2917676/ |access-date=25 June 2019 |work=SlashGear |date=29 September 2008}}</ref>
|-
|2008
|style="color:#AAAAAA"| ''?''
|16384 Mbit
|DDR3
|Samsung
|50&nbsp;nm
|CMOS
|style="color:#AAAAAA"| ''?''
|-
| rowspan="2" |2009
| rowspan="2" style="color:#AAAAAA"| ''?''
|style="color:#AAAAAA"| ''?''
|DDR3
|Hynix
|[[45 nanometer|44 nm]]
|rowspan="2" | CMOS
|rowspan="2" style="color:#AAAAAA"| ''?''
|rowspan="2" | <ref name="hynix2000s"/>
|-
|2048 Mbit
|DDR3
|Hynix
|[[40 nanometer|40 nm]]
|-
| rowspan="2" |2011
| rowspan="2" style="color:#AAAAAA"| ''?''
|16384 Mbit
|DDR3
|Hynix
|40&nbsp;nm
|CMOS
|style="color:#AAAAAA"| ''?''
|<ref name="hynix2010s">{{cite web |title=History: 2010s |url=http://www.az5miao.com/history2010.html |website=az5miao |access-date=4 April 2022}}</ref>
|-
|2048 Mbit
|[[DDR4]]
|Hynix
|[[32 nanometer|30&nbsp;nm]]
|CMOS
|style="color:#AAAAAA"| ''?''
|<ref name="hynix2010s"/>
|-
|2013
|style="color:#AAAAAA"| ''?''
|style="color:#AAAAAA"| ''?''
|[[LPDDR4]]
|Samsung
|[[20 nm]]
|CMOS
|style="color:#AAAAAA"| ''?''
|<ref name="hynix2010s"/>
|-
|2014
|style="color:#AAAAAA"| ''?''
|8192 Mbit
|LPDDR4
|Samsung
|20&nbsp;nm
|CMOS
|style="color:#AAAAAA"| ''?''
|<ref>{{cite web |title=Our Proud Heritage from 2010 to Now |url=https://www.samsung.com/semiconductor/about-us/history-04/ |website=[[Samsung Semiconductor]] |publisher=[[Samsung]] |access-date=25 June 2019}}</ref>
|-
|2015
|style="color:#AAAAAA"| ''?''
|12 Gbit
|LPDDR4
|Samsung
|20&nbsp;nm
|CMOS
|style="color:#AAAAAA"| ''?''
|<ref name="samsung-history"/>
|-
| rowspan="2" |2018
| rowspan="2" style="color:#AAAAAA"| ''?''
|8192 Mbit
|[[LPDDR#LP-DDR5|LPDDR5]]
|Samsung
|[[10 nm process|10 nm]]
|[[FinFET]]
|style="color:#AAAAAA"| ''?''
|<ref>{{cite news |title=Samsung Electronics Announces Industry's First 8Gb LPDDR5 DRAM for 5G and AI-powered Mobile Applications |url=https://news.samsung.com/global/samsung-electronics-announces-industrys-first-8gb-lpddr5-dram-for-5g-and-ai-powered-mobile-applications |access-date=8 July 2019 |publisher=[[Samsung]] |date=July 17, 2018}}</ref>
|-
|128 Gbit
|DDR4
|Samsung
|10&nbsp;nm
|FinFET
|style="color:#AAAAAA"| ''?''
|<ref>{{cite news |date=6 September 2018 |title=Samsung Unleashes a Roomy DDR4 256GB RAM |work=[[Tom's Hardware]] |url=https://www.tomshardware.co.uk/samsung-256gb-ddr4-ram,news-59123.html |url-status=dead |access-date=4 April 2022 |archive-url=https://web.archive.org/web/20190621205106if_/https://www.tomshardware.co.uk/samsung-256gb-ddr4-ram,news-59123.html |archive-date=June 21, 2019}}</ref>
|}