Editing CPU cache (section)

====Separate versus unified====
In a separate cache structure, instructions and data are cached separately, meaning that a cache line is used to cache either instructions or data, but not both; various benefits have been demonstrated with separate data and instruction [[translation lookaside buffer]]s.<ref>{{cite journal |author1=Chen, J. Bradley |author2=Borg, Anita |author3=Jouppi, Norman P. |title=A Simulation Based Study of TLB Performance |journal=ACM SIGARCH Computer Architecture News |volume=20 |issue=2 |year=1992 |page=114&ndash;123 |doi=10.1145/146628.139708|doi-access=free }}</ref> In a unified structure, this constraint is not present, and cache lines can be used to cache both instructions and data.