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Flash memory
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==={{Anchor|SERIAL}}Serial flash=== [[File:IPhone 3G teardown - Silicon Storage Tech SST25VF080B-3309.jpg|thumb|Serial Flash: Silicon Storage Tech SST25VF080B]] Serial flash is a small, low-power flash memory that provides only serial access to the data - rather than addressing individual bytes, the user reads or writes large contiguous groups of bytes in the address space serially. [[Serial Peripheral Interface Bus]] (SPI) is a typical protocol for accessing the device. When incorporated into an [[embedded system]], serial flash requires fewer wires on the [[printed circuit board|PCB]] than parallel flash memories, since it transmits and receives data one bit at a time. This may permit a reduction in board space, power consumption, and total system cost. There are several reasons why a serial device, with fewer external pins than a parallel device, can significantly reduce overall cost: * Many [[application-specific integrated circuit|ASICs]] are pad-limited, meaning that the size of the [[die (integrated circuit)|die]] is constrained by the number of [[wire bond]] pads, rather than the complexity and number of gates used for the device logic. Eliminating bond pads thus permits a more compact integrated circuit, on a smaller die; this increases the number of dies that may be fabricated on a [[wafer (electronics)|wafer]], and thus reduces the cost per die. * Reducing the number of external pins also reduces assembly and [[IC package|packaging]] costs. A serial device may be packaged in a smaller and simpler package than a parallel device. * Smaller and lower pin-count packages occupy less PCB area. * Lower pin-count devices simplify PCB [[routing (EDA)|routing]]. There are two major SPI flash types. The first type is characterized by small blocks and one internal SRAM block buffer allowing a complete block to be read to the buffer, partially modified, and then written back (for example, the Atmel [[AT45]] ''DataFlash'' or the [[Micron Technology]] Page Erase NOR Flash). The second type has larger sectors where the smallest sectors typically found in this type of SPI flash are 4 KB, but they can be as large as 64 KB. Since this type of SPI flash lacks an internal SRAM buffer, the complete block must be read out and modified before being written back, making it slow to manage. However, the second type is cheaper than the first and is therefore a good choice when the application is code shadowing. The two types are not easily exchangeable, since they do not have the same pinout, and the command sets are incompatible. Most [[FPGA]]s are based on SRAM configuration cells and require an external configuration device, often a serial flash chip, to reload the configuration [[bitstream]] every power cycle.<ref name="maxfield"> Clive Maxfield. [https://books.google.com/books?id=u0xyEuXF3l4C "Bebop to the Boolean Boogie: An Unconventional Guide to Electronics"]. p. 232. </ref> ====Firmware storage==== With the increasing speed of modern CPUs, parallel flash devices are often much slower than the memory bus of the computer they are connected to. Conversely, modern [[Static RAM|SRAM]] offers access times below 10 [[nanosecond|ns]], while [[DDR2 SDRAM]] offers access times below 20 ns. Because of this, it is often desirable to [[shadow RAM|shadow]] code stored in flash into RAM; that is, the code is copied from flash into RAM before execution, so that the CPU may access it at full speed. Device [[firmware]] may be stored in a serial flash chip, and then copied into SDRAM or SRAM when the device is powered-up.<ref>Many serial flash devices implement a ''bulk read'' mode and incorporate an internal address counter, so that it is trivial to configure them to transfer their entire contents to RAM on power-up. When clocked at 50 MHz, for example, a serial flash could transfer a 64 [[Mbit]] firmware image in less than two seconds.</ref> Using an external serial flash device rather than on-chip flash removes the need for significant process compromise (a manufacturing process that is good for high-speed logic is generally not good for flash and vice versa). Once it is decided to read the firmware in as one big block it is common to add compression to allow a smaller flash chip to be used. Since 2005, many devices use serial NOR flash to deprecate parallel NOR flash for firmware storage. Typical applications for serial NOR flash include storing firmware for [[hard drive]]s, [[BIOS]], [[Option ROM]] of [[expansion card]]s, [[DSL modem]]s, etc.
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