Editing Serial Peripheral Interface (section)

=== JTAG ===
{{Main articles|JTAG}}
Although there are some similarities between SPI and the [[JTAG]] (IEEE 1149.1-2013) protocol, they are not interchangeable. JTAG is specifically intended to provide reliable [[Boundary scan|test access to the I/O pins]] from an off-board controller with less precise signal delay and skew parameters, while SPI has many varied applications. While not strictly a level sensitive interface, the JTAG protocol supports the recovery of both setup and hold violations between JTAG devices by reducing the clock rate or changing the clock's duty cycles. Consequently, the JTAG interface is not intended to support extremely high data rates.<ref>IEEE 1149.1-2013</ref>