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Synchronous dynamic random-access memory
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== See also == * [[GDDR]] (graphics DDR) and its subtypes [[GDDR2]], [[GDDR3]], [[GDDR4]], [[GDDR5]], [[GDDR6]] and [[GDDR7]] * [[List of device bandwidths]] * [[Serial presence detect]] - EEPROM with timing data on SDRAM modules * [http://taututorial.yolasite.com/ SDRAM Tutorial] - Flash website built by Tel-Aviv University students * A concise but thorough review of SDRAM architecture/terminology and command timing dependencies in [http://drum.lib.umd.edu/bitstream/1903/11269/1/Gross_umd_0117N_11844.pdf High-Performance DRAM System Design Constraints and Considerations], a master thesis from the University of Maryland.
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