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Bus (computing)
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==Memory bus== {{Unreferenced section|date=June 2023}} The ''memory bus'' is the bus that connects the [[main memory]] to the [[memory controller]] in computer systems. Originally, general-purpose buses like [[VMEbus]] and the [[S-100 bus]] were used, but to reduce [[latency (engineering)|latency]], modern memory buses are designed to connect directly to DRAM chips, and thus are defined by chip standards bodies such as [[JEDEC]]. Examples are the various generations of [[SDRAM]], and serial point-to-point buses like [[SLDRAM]] and [[RDRAM]].
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