Editing Control store (section)

===Timing, latching and avoiding a race condition===
The control store usually has a register on its outputs. The outputs that go back into the sequencer to determine the next address have to go through some sort of register to prevent the creation of a [[race condition]].<ref>
Don Lancaster.
[https://www.tinaja.com/ebooks/tvtcb.pdf "TV Typewriter Cookbook"].
p. 62.
([[TV Typewriter]])
</ref>
In most designs all of the other bits also go through a register. This is because the machine will work faster if the execution of the next microinstruction is delayed by one cycle. This register is known as a pipeline register. Very often the execution of the next microinstruction is dependent on the result of the current microinstruction, which will not be stable until the end of the current microcycle. It can be seen that either way, all of the outputs of the control store go into one big register. Historically it used to be possible to buy EPROMs with these register bits on the same chip.

The [[clock signal]] determining the [[clock rate]], which is the cycle time of the system, primarily clocks this register.