Editing Intel iAPX 432 (section)

===The project's failures===
Some of the innovative features of the iAPX 432 were detrimental to good performance. In many cases, the iAPX 432 had a significantly slower instruction throughput than conventional microprocessors of the era, such as the [[National Semiconductor 32016]], [[Motorola 68010]] and [[Intel 80286]]. One problem was that the two-chip implementation of the GDP limited it to the speed of the motherboard's electrical wiring. A larger issue was the capability architecture needed large associative caches to run efficiently, but the chips had no room left for that. The instruction set also used bit-aligned variable-length instructions instead of the usual semi-fixed byte or word-aligned formats used in the majority of computer designs. Instruction decoding was therefore more complex than in other designs. Although this did not hamper performance in itself, it used additional transistors (mainly for a large [[barrel shifter]]) in a design that was already lacking space and transistors for caches, wider buses and other performance oriented features. In addition, the BIU was designed to support fault-tolerant systems, and in doing so up to 40% of the bus time was held up in [[wait state]]s.

Another major problem was its immature and untuned [[Ada (programming language)|Ada]] [[compiler]]. It used high-cost object-oriented instructions in every case, instead of the faster scalar instructions where it would have made sense to do so. For instance the iAPX 432 included a very expensive inter-module [[procedure call]] instruction, which the compiler used for all calls, despite the existence of much faster branch and link instructions. Another very slow call was enter_environment, which set up the memory protection. The compiler ran this for every single variable in the system, even when variables were used inside an existing environment and did not have to be checked. To make matters worse, data passed to and from procedures was always passed [[Evaluation strategy#Call by copy-restore|by value-return]] rather than by reference.  When running the [[Dhrystone]] benchmark, parameter passing took ten times longer than all other computations combined.<ref name="smotherman">Mark Smotherman, [http://people.cs.clemson.edu/~mark/432.html Overview of Intel 432]</ref>

According to the ''New York Times'', "the i432 ran 5 to 10 times more slowly than its competitor, the Motorola 68000".<ref name="MARKOFF">John Markoff, [https://www.nytimes.com/1998/04/05/business/inside-intel-the-future-is-riding-on-a-new-chip.html Inside Intel, The Future Is Riding on A New Chip], April 5, 1998</ref>