Editing MIPS Technologies (section)

==Products==
{{main|List of MIPS architecture processors}}
MIPS Technologies created the processor architecture that is licensed to chip makers.<ref>Agam Shah, IDG. "[http://www.pcworld.com/article/226355/mips_porting_googles_android_30_os_for_its_processors.html MIPS Porting Google's Android 3.0 OS for Its Processors]." April 26, 2011. Retrieved October 3, 2011.</ref><ref>Dean Takahashi, VentureBeat. "[https://venturebeat.com/2011/01/04/mips-breaks-into-android-mobile-phones-with-latest-chips/ MIPS breaks into Android mobile phones with latest chips]." January 4, 2011. Retrieved October 5, 2011.</ref> Before the acquisition, the company had 125+ licensees who ship more than 500 million MIPS-based processors each year.<ref name=less>Brian Caufield, Forbes. "[https://archive.today/20120918193811/http://www.forbes.com/forbes/2011/0509/technology-mips-sandeep-vij-dvd-micro-chips-less-more.html For MIPS, Less is More]." April 20, 2011. Retrieved September 26, 2011.</ref>

MIPS processor architectures and cores are used in home entertainment,<ref>Dean Takahashi, VentureBeat. "[https://venturebeat.com/2010/01/05/mips-bets-big-on-google-android-systems-for-the-digital-home/ MIPS bets big on Google Android systems for the digital home]." January 5, 2010. Retrieved September 30, 2011.</ref> networking<ref name=junko1005>Junko Yoshida, EE Times. "[http://www.eetimes.com/electronics-news/4205942/Blow-out-quarter-highlights-MIPS-comeback ‘Blow-out quarter’ highlights MIPS comeback]." August 5, 2010. Retrieved October 1, 2011.</ref> and communications products. The company licensed its 32- and 64-bit architectures as well as 32-bit cores.<ref>John Spooner, CNET. "[http://news.cnet.com/MIPS-nips-new-licenses-for-chips/2100-1040_3-255785.html MIPS nips new licenses for chips]." April 12, 2001. Retrieved October 3, 2011.</ref>

The MIPS32 architecture is a high-performance 32-bit instruction set architecture (ISA) that is used in applications such as 32-bit microcontrollers, home entertainment, home networking devices and mobile designs.<ref name=M14K>Robert Cravotta, Embedded Insights. "[http://www.embeddedinsights.com/epd/mips/mips-m14k.php M14K]." Retrieved October 3, 2011.</ref> MIPS customers license the architecture to develop their own processors or license off-the-shelf cores from MIPS that are based on the architecture.<ref>Zewde Yeraswork, CRN. "[http://www.crn.com/news/components-peripherals/229400564/mips-prepares-64-bit-prodigy-cpu-core-architecture.htm;jsessionid=SA1gndox1OEtiWTx6V9Eig**.ecappj01 MIPS Prepares 64-Bit Prodigy CPU Core Architecture]." March 29, 2011. Retrieved October 2, 2011.</ref>

The MIPS64 architecture is a high performance 64-bit instruction set architecture that is widely used in networking infrastructure equipment through MIPS licensees such as Cavium Networks<ref>Doug Mohney, The Inquirer. "[https://web.archive.org/web/20110121015142/http://www.theinquirer.net/inquirer/news/1048558/cavium-hotrods-mips-architecture Cavium Hotrods MIPS architecture]." June 25, 2007. Retrieved October 5, 2011.</ref> and Broadcom.<ref>Eric Brown, LinuxForDevices. "{{cite web|url=http://www.linuxfordevices.com/c/a/News/Enea-and-NetLogic-Microsystems-Linux-development-build-system/ |title=Enea, NetLogic ship Linux development platform for MIPS |archive-url=https://archive.today/20130104014216/http://www.linuxfordevices.com/c/a/News/Enea-and-NetLogic-Microsystems-Linux-development-build-system/ |archive-date=January 4, 2013 |url-status=dead }}." September 20, 2010. Retrieved September 30, 2011.</ref>

SmartCE (Connected Entertainment) is a reference platform that integrates [[Android (operating system)|Android]], [[Adobe Flash]] platform for TV, [[Skype]], the Home Jinni ConnecTV application and other applications.<ref name=Dean0105>Dean Takahashi, VentureBeat. "[https://venturebeat.com/2011/01/05/mips-aims-to-drive-android-into-consumer-electronics-gear/ MIPS aims to drive into consumer electronics gear]."January 5, 2010. Retrieved October 5, 2011.</ref><ref>Janko Roettgers, GigaOm. "[http://gigaom.com/video/next-up-for-android-your-cable-box/ Next Up for Android: Your Cable Box?] {{webarchive|url=https://web.archive.org/web/20110918081942/http://gigaom.com/video/next-up-for-android-your-cable-box/ |date=September 18, 2011 }}." January 5, 2011. Retrieved September 30, 2011.</ref> SmartCE lets OEM customers create integrated products more quickly.

===MIPS processor core families===

The MIPS processor cores are divided by Imagination into three major families:<ref>Imagination Technologies. "[http://www.imgtec.com/mips/ MIPS Processors]." Retrieved June 20, 2015.</ref>
* Warrior: hardware virtualization, hardware multi-threading, and SIMD<ref>Imagination Technologies. "[http://www.imgtec.com/mips/warrior/ MIPS Warrior Processor Cores]." Retrieved June 20, 2015.</ref>
** M-class: M5100 and M5150,<ref>{{Cite web|url=https://imgtec.com/mips/warrior/m-class-m51xx-core-family/|title=M-Class M51xx Core Family - Imagination Technologies|website=Imagination Technologies|language=en-GB|access-date=June 22, 2016}}</ref> M6200 and M6250<ref>{{Cite web|url=https://imgtec.com/mips/warrior/m-class-m6200-and-m6250-processor-cores/|title=M-Class M6200 and M6250 Processor Cores - Imagination Technologies|website=Imagination Technologies|language=en-GB|access-date=June 22, 2016}}</ref>
** I-class: I6400,<ref>{{Cite web|url=https://imgtec.com/mips/warrior/i-class-i6400-multiprocessor-core/|title=I-Class I6400 Multiprocessor Core - Imagination Technologies|website=Imagination Technologies|language=en-GB|access-date=June 22, 2016}}</ref> I7200<ref>{{Cite web|url=https://www.anandtech.com/show/12699/mips-announces-i7200-32bit-cpu-with-new-nanomips-isa|title=MIPS Announces I7200 32-bit CPU With New nanoMIPS ISA}}</ref>
** P-class: P5600,<ref name=p5660_core>{{Cite web|url=https://imgtec.com/mips/warrior/p-class-p5600-multiprocessor-core/|title=P-Class P5600 Multiprocessor Core - Imagination Technologies|website=Imagination Technologies|language=en-GB|access-date=June 22, 2016}}</ref> P6600<ref name=p5660_core />
* Aptiv: ''microAptiv'' (compact, real-time embedded processor core), ''interAptiv'' (multiprocessor, multi-threaded core with a nine-stage pipeline), ''proAptiv'' (super-scalar, deeply out-of-order processor core with high CoreMark/MHz score)<ref>Imagination Technologies. "[http://www.imgtec.com/mips/aptiv/ MIPS Aptiv Processor Cores]." Retrieved June 20, 2015.</ref>
* Classic. 4K, M14K,<ref name="M14K" /> 24K,<ref>Robert Cravotta, Embedded Insights. "[http://www.embeddedinsights.com/epd/mips/mips-24k.php 24K]." Retrieved October 6, 2011.</ref> 34K,<ref>Robert Cravotta, Embedded Insights. "[http://www.embeddedinsights.com/epd/mips/mips-34k.php 34K]." Retrieved October 6, 2011.</ref> 74K,<ref>Robert Cravotta, Embedded Insights. "[http://www.embeddedinsights.com/epd/mips/mips-74k.php 74K]." Retrieved October 2, 2011.</ref> 1004K<ref>Robert Cravotta, Embedded Insights. "[http://www.embeddedinsights.com/epd/mips/mips-1004k.php 1004K]." Retrieved October 2, 2011.</ref> (multicore and multithreaded) and 1074K (superscalar and multithreaded) families.

=== MIPS eVocore RISC-V CPU IP cores ===
The MIPS eVocore CPUs are the first RISC-V CPU IP cores from MIPS. Both cores provide support for privileged hardware virtualization, user defined custom extensions, multi-threading, hybrid debug, and functional safety.<ref name=":0" /> They include:

* '''eVocore P8700:''' multiprocessing system combining a deep pipeline with multi-issue out-of-order (OOO) execution and multi-threading. It can scale up to 64 clusters, 512 cores and 1,024 harts/threads.<ref name=":0" />
* '''eVocore I8500:''' in-order multiprocessing system. Each core combines multi-threading and a triple-issue pipeline.<ref name=":0" />