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==Unit of address resolution== {{see also|Word (computer architecture)|Binary prefix#Main memory}} Most modern computers are ''[[byte-addressable]]''. Each address identifies a single 8-bit [[byte]] ([[octet (computing)|octet]]) of storage. Data larger than a single byte may be stored in a sequence of consecutive addresses. There exist ''[[word-addressable]]'' computers, where the minimal addressable storage unit is exactly the processor's [[word (computer architecture)|word]].{{efn|Some word-addressable computers have byte-handling instructions, typically supporing byte sizes up to a word but not supporting bytes that straddled words. For example, the [[DEC PDP-6]] and [[PDP-10]] have {{bulleted list|Deposit Byte (DPB)|Increment Byte Pointer (IBP)|Increment and Deposit Byte (IDPB)|Increment and Load Byte (ILDB)|Load Byte (LDB)|class=inline}}}} For example, the [[Data General Nova]] [[minicomputer]], and the [[Texas Instruments TMS9900]] and [[IMP-16|National Semiconductor IMP-16]] [[microcomputer]]s, used 16-bit [[word (computer architecture)|word]]s, and there are many old [[mainframe computer]]s that use [[36-bit]] word addressing (such as the [[IBM 7090]], with 15-bit word addresses, giving an address space of 2<sup>15</sup> 36-bit words, approximately 128 kilobytes of storage, and the [[DEC PDP-6]]/[[PDP-10]], with 18-bit word addresses, giving an address space of 2<sup>18</sup> 36-bit words, approximately 1 megabyte of storage), not byte addressing. The range of addressing of memory depends on the bit size of the bus used for addresses β the more bits used, the more addresses are available to the computer. For example, an 8-bit-byte-addressable machine with a 20-bit [[address bus]] (e.g. [[Intel 8086]]) can address 2<sup>20</sup> (1,048,576) memory locations, or one [[Mebibyte|MiB]] of memory, while a 32-bit bus (e.g. [[Intel 80386]]) addresses 2<sup>32</sup> (4,294,967,296) locations, or a 4 [[Gibibyte|GiB]] address space. In contrast, a 36-bit word-addressable machine with an 18-bit address bus addresses only 2<sup>18</sup> (262,144) 36-bit locations (9,437,184 bits), equivalent to 1,179,648 8-bit bytes, or 1152 [[Kibibyte|KiB]], or 1.125 MiB β slightly more than the 8086. A small number of older machines are ''[[bit]]-addressable''. For example, a variable filed length (VFL) instruction on the [[IBM 7030]] {{qi|Stretch}} specifies a bit address, a byte size of 1 to 8 and a field length. Some older computers ([[decimal computer]]s) are ''[[decimal]] [[Numerical digit|digit]]-addressable''. For example, each address in the [[IBM 1620]]'s [[magnetic-core memory]] identified a single six bit [[binary-coded decimal]] digit, consisting of a [[parity bit]], [[flag bit]] and four numerical bits.<ref>{{cite book | title = IBM 1620 Central Processing Unit, Model 1 | id = A26-5706-3 | url = http://bitsavers.org/pdf/ibm/1620/A26-5706-3_IBM_1620_CPU_Model_1_Jul65.pdf | publisher = [[IBM]] | series = Systems Reference Library | access-date = March 7, 2025 }} </ref> The 1620 used 5-digit decimal addresses, so in theory the highest possible address was 99,999. In practice, the CPU supported 20,000 memory locations, and up to two optional external memory units could be added, each supporting 20,000 addresses, for a total of 60,000 (00000β59999). Some older computers are character-addressable, with 6-bit [[BCD (character encoding)|BCD]] characters containing a 2-bit zone and a 4-bit digit; the characters in an address only have digit values representing 0β9. Typically some of the zone bits are part of the address and some are used for other purposes, e.g., index register, indirect address.<ref>{{cite book | title = System Reference Manual - RCA 3301 | id = 94-16-000 | date = September 1967 | url = http://bitsavers.org/pdf/rca/3301/94-16-000_RCA_3301_System_Reference_Manual_Sep67.pdf | publisher = [[RCA]] EDP | access-date = March 7, 2025 }} </ref> Some older computers are decimal-word addressable, typically with 4-digit addresses.<ref>{{cite book | title = IBM 7070-7074 Principles of Operation | id = GA22-7003-6 | url = http://bitsavers.org/pdf/ibm/7070/GA22-7003-6_7070-7074prcOps.pdf | publisher = [[IBM]] | series = Systems Reference Library | access-date = March 7, 2025 }} </ref> In some machines the address fields also select index registers, restricting the range of possible address.<ref>{{cite book | title = 650 magnetic drum data-processing machine - manual of operation | id = 22-6060-2 | date = June 1955 | url = http://bitsavers.org/pdf/ibm/650/22-6060-2_650_OperMan.pdf | publisher = [[IBM]]22-6060-2 | access-date = March 7, 2025 }} </ref> ===Word size versus address size=== [[Word (computer architecture)|Word]] size is a characteristic of [[computer architecture]] denoting the number of bits that a CPU can process at one time. Modern processors, including [[embedded systems]], usually have a word size of 8, 16, 24, 32 or 64 bits; most current general-purpose computers use 32 or 64 bits. Many different sizes have been used historically, including 8, 9, 10, 12, 18, 24, 36, 39, 40, 48 and 60 bits. Very often, when referring to the ''word size'' of a modern computer, one is also describing the size of address space on that computer. For instance, a computer said to be "[[32-bit]]" also usually allows 32-bit memory addresses; a byte-addressable 32-bit computer can address 2<sup>32</sup> = 4,294,967,296 bytes of memory, or 4 gibibytes (GiB). This allows one memory address to be efficiently stored in one word. However, this does not always hold true. Computers can have memory addresses larger or smaller than their word size. For instance, many [[8-bit]] processors, such as the [[MOS Technology 6502]], [[MOS Technology 6502#Technical description|supported 16-bit addresses]]β if not, they would have been limited to a mere 256 [[byte]]s of memory addressing. The 16-bit [[Intel 8088]] and [[Intel 8086]] supported 20-bit addressing via [[Intel 8086#Segmentation|segmentation]], allowing them to access 1 MiB rather than 64 KiB of memory. All Intel [[Pentium (brand)|Pentium]] processors since the [[Pentium Pro]] include [[Physical Address Extension]]s (PAE) which support mapping 36-bit physical addresses to 32-bit virtual addresses. Many early [[LISP]] implementations on, e.g., [[36-bit]] processors, held 2 addresses per word as the result of a [[cons]]. Some early processors held 2 and even 3 addresses per instruction word. In theory, modern byte-addressable [[64-bit]] computers can address 2<sup>64</sup> bytes (16 [[exbibyte]]s), but in practice the amount of memory is limited by the CPU, the [[memory controller]], or the [[printed circuit board]] design (e.g., number of physical memory connectors or amount of soldered-on memory).
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