Editing Multiply–accumulate operation (section)

===Support===
The FMA operation is included in [[IEEE 754-2008]].

The [[C99|1999 standard]] of the [[C (programming language)|C programming language]] supports the FMA operation through the <code>fma()</code> standard math library function and the automatic transformation of a multiplication followed by an addition (contraction of floating-point expressions), which can be explicitly enabled or disabled with standard pragmas ({{code|#pragma STDC FP_CONTRACT}}). The [[GNU Compiler Collection|GCC]] and [[Clang]] C compilers do such transformations by default for processor architectures that support FMA instructions. With GCC, which does not support the aforementioned pragma,<ref>{{cite web |title=Bug 20785 - Pragma STDC * (C99 FP) unimplemented |url=https://gcc.gnu.org/bugzilla/show_bug.cgi?id=20785 |access-date=2022-02-02 |website=gcc.gnu.org}}</ref> this can be globally controlled by the <code>-ffp-contract</code> command line option.<ref>{{Cite web|title=Optimize Options (Using the GNU Compiler Collection (GCC))|url=https://gcc.gnu.org/onlinedocs/gcc/Optimize-Options.html|access-date=2022-02-02|website=gcc.gnu.org}}</ref>

The fused multiply–add operation was introduced as "multiply–add fused" in the IBM [[POWER1]] (1990) processor,<ref>{{cite journal |last1=Montoye |first1=R. K. |last2=Hokenek |first2=E. |last3=Runyon |first3=S. L. |title=Design of the IBM RISC System/6000 floating-point execution unit |journal=IBM Journal of Research and Development |date=January 1990 |volume=34 |issue=1 |pages=59–70 |doi=10.1147/rd.341.0059}}{{closed access}}</ref> but has been added to numerous processors:

* IBM [[POWER1]] (1990)
* [[Hewlett-Packard|HP]] [[PA-8000]] (1996) and above
* [[Hitachi, Ltd.|Hitachi]] [[SuperH#SH-4|SuperH SH-4]] (1998)
* [[IBM]] [[z/Architecture]] (since 1998)
* [[Sony Computer Entertainment|SCE]]-[[Toshiba]] [[Emotion Engine]] (1999)
* Intel [[Itanium]] (2001)
* STI [[Cell (microprocessor)|Cell]] (2006)
* [[Fujitsu]] [[SPARC64 VI]] (2007) and above
* ([[MIPS architecture|MIPS]]-compatible) [[Loongson]]-2F (2008)<ref>{{cite web |url=http://www.mdronline.com/mpr/h/2008/1103/224401.html |title=Godson-3 Emulates x86: New MIPS-Compatible Chinese Processor Has Extensions for x86 Translation}}</ref>
* [[RISC-V]] instruction set (2010)
* ARM processors with VFPv4 and/or NEONv2:
** [[ARM Cortex-M4F]] (2010)
** STM32 Cortex-M33 (VFMA operation)<ref>{{cite web |url=https://www.st.com/resource/en/programming_manual/pm0264-stm32-cortexm33-mcus-programming-manual-stmicroelectronics.pdf |title=STM32 Cortex-M33 MCUs programming manual |work=ST |access-date=2024-05-06}}</ref>
** [[ARM Cortex-A5]] (2012)
** [[ARM Cortex-A7 MPCore|ARM Cortex-A7]] (2013)
** [[ARM Cortex-A15 MPCore|ARM Cortex-A15]] (2012)
** [[Krait (CPU)|Qualcomm Krait]] (2012)
** [[Apple A6]] (2012)
** All [[ARM architecture#Armv8-A|ARMv8]] processors
*** [[Fujitsu A64FX]] has "Four-operand FMA with Prefix Instruction".
* x86 processors with [[FMA instruction set|FMA3 and/or FMA4 instruction set]]
** AMD [[Bulldozer (processor)|Bulldozer]] (2011, FMA4 only)
** AMD [[Piledriver (microarchitecture)|Piledriver]] (2012, FMA3 and FMA4)<ref>{{cite web |last1=Hollingsworth |first1=Brent |title=New "Bulldozer" and "Piledriver" Instructions |url=https://developer.amd.com/resources/developer-guides-manuals/new-bulldozer-and-piledriver-instructions/ |publisher=AMD Developer Central |date=October 2012}}</ref>
** [[Intel Haswell]] (2013, FMA3 only)<ref>{{cite web |url=http://www.reghardware.co.uk/2008/08/19/idf_intel_architecture_roadmap/ |title=Intel adds 22nm octo-core 'Haswell' to CPU design roadmap |work=The Register |access-date=2008-08-19 |archive-url=https://web.archive.org/web/20120217051330/http://www.reghardware.com/2008/08/19/idf_intel_architecture_roadmap/ |archive-date=2012-02-17 |url-status=dead }}</ref>
** AMD [[Steamroller (microarchitecture)|Steamroller]] (2014, FMA3 and FMA4)
** AMD [[Excavator (microarchitecture)|Excavator]] (2015, FMA3 and FMA4)
** Intel [[Skylake (microarchitecture)|Skylake]] (2015, FMA3 only)
** AMD [[Zen (microarchitecture)|Zen]] (2017, FMA3 only)
* [[Elbrus-8S|Elbrus-8SV]] (2018)
* GPUs and GPGPU boards:
** [[List of AMD graphics processing units|AMD GPUs]] (2009) and newer
*** [[TeraScale (microarchitecture)#TeraScale 2|TeraScale 2 "Evergreen"]]-series based
*** [[Graphics Core Next]]-based
** [[List of Nvidia graphics processing units|Nvidia GPUs]] (2010) and newer
*** [[Fermi (microarchitecture)|Fermi]]-based (2010)
*** [[Kepler (microarchitecture)|Kepler]]-based (2012)
*** [[Maxwell (microarchitecture)|Maxwell]]-based (2014)
*** [[Pascal (microarchitecture)|Pascal]]-based (2016)
*** [[Volta (microarchitecture)|Volta]]-based (2017)
** Intel GPUs since [[Intel HD and Iris Graphics#Sandy Bridge|Sandy Bridge]]
** [[Intel MIC]] (2012)
** [[Mali (GPU)|ARM Mali T600 Series]] (2012) and above
* Vector Processors:
** [[NEC SX-Aurora TSUBASA]]