Editing Neuromorphic computing (section)

===Neuromemristive systems===
Neuromemristive systems are a subclass of neuromorphic computing systems that focuses on the use of memristors to implement [[neuroplasticity]]. While neuromorphic engineering focuses on mimicking biological behavior, neuromemristive systems focus on abstraction.<ref>{{Cite web|url=https://digitalops.sandia.gov/Mediasite/Play/a10cf6ceb55d47608bb8326dd00e46611d|title=002.08 N.I.C.E. Workshop 2014: Towards Intelligent Computing with Neuromemristive Circuits and Systems – Feb. 2014|website=digitalops.sandia.gov|access-date=2019-08-26}}</ref> For example, a neuromemristive system may replace the details of a [[Cerebral cortex|cortical]] microcircuit's behavior with an abstract neural network model.<ref>C. Merkel and D. Kudithipudi, "Neuromemristive extreme learning machines for pattern classification," ISVLSI, 2014.</ref>

There exist several neuron inspired threshold logic functions<ref name="Maan 1–13"/> implemented with memristors that have applications in high level [[pattern recognition]] applications. Some of the applications reported recently include [[speech recognition]],<ref>{{Cite journal|title = Memristor pattern recogniser: isolated speech word recognition|journal = Electronics Letters|pages = 1370–1372|volume = 51|issue = 17|doi = 10.1049/el.2015.1428|first1 = A.K.|last1 = Maan|first2 = A.P.|last2 = James|first3 = S.|last3 = Dimitrijev|year = 2015|bibcode = 2015ElL....51.1370M|hdl = 10072/140989|s2cid = 61454815|hdl-access = free}}</ref> [[face recognition]]<ref>{{Cite journal|title = Memristive Threshold Logic Face Recognition|journal = Procedia Computer Science|date = 2014-01-01|pages = 98–103|volume = 41|series = 5th Annual International Conference on Biologically Inspired Cognitive Architectures, 2014 BICA|doi = 10.1016/j.procs.2014.11.090|first1 = Akshay Kumar|last1 = Maan|first2 = Dinesh S.|last2 = Kumar|first3 = Alex Pappachen|last3 = James|doi-access = free|hdl = 10072/68372|hdl-access = free}}</ref> and [[object recognition]].<ref>{{Cite journal|title = Memristive Threshold Logic Circuit Design of Fast Moving Object Detection|journal = IEEE Transactions on Very Large Scale Integration (VLSI) Systems|date = 2015-10-01|issn = 1063-8210|pages = 2337–2341|volume = 23|issue = 10|doi = 10.1109/TVLSI.2014.2359801|first1 = A.K.|last1 = Maan|first2 = D.S.|last2 = Kumar|first3 = S.|last3 = Sugathan|first4 = A.P.|last4 = James|arxiv = 1410.1267|s2cid = 9647290}}</ref> They also find applications in replacing conventional digital logic gates.<ref>{{Cite journal|title = Resistive Threshold Logic|journal = IEEE Transactions on Very Large Scale Integration (VLSI) Systems|date = 2014-01-01|issn = 1063-8210|pages = 190–195|volume = 22|issue = 1|doi = 10.1109/TVLSI.2012.2232946|first1 = A.P.|last1 = James|first2 = L.R.V.J.|last2 = Francis|first3 = D.S.|last3 = Kumar|arxiv = 1308.0090|s2cid = 7357110}}</ref><ref>{{Cite journal|title = Threshold Logic Computing: Memristive-CMOS Circuits for Fast Fourier Transform and Vedic Multiplication|journal = IEEE Transactions on Very Large Scale Integration (VLSI) Systems|date = 2015-11-01|issn = 1063-8210|pages = 2690–2694|volume = 23|issue = 11|doi = 10.1109/TVLSI.2014.2371857|first1 = A.P.|last1 = James|first2 = D.S.|last2 = Kumar|first3 = A.|last3 = Ajayan|arxiv = 1411.5255|s2cid = 6076956}}</ref>

For (quasi)ideal passive memristive circuits, the evolution of the memristive memories can be written in a closed form ([[Caravelli-Traversa-Di Ventra equation|Caravelli–Traversa–Di Ventra equation]]):<ref>{{cite journal |last=Caravelli  |display-authors=etal|arxiv=1608.08651 |title=The complex dynamics of memristive circuits: analytical results and universal slow relaxation |year=2017 |doi=10.1103/PhysRevE.95.022140 |pmid= 28297937 |volume=95 |issue= 2 |page= 022140 |journal=Physical Review E|bibcode=2017PhRvE..95b2140C |s2cid=6758362}}</ref><ref name="Caravelli 2021 022140">{{cite journal |last=Caravelli  |display-authors=etal|arxiv=1608.08651 |title=Global minimization via classical tunneling assisted by collective force field formation |year=2021 |doi=10.1126/sciadv.abh1542 |pmid= 28297937 |volume=7 |issue=52 |journal=Science Advances|page=022140 |bibcode=2021SciA....7.1542C |s2cid=231847346 }}</ref>

:<math> \frac{d}{dt} \vec{X} = -\alpha \vec{X}+\frac{1}{\beta} (I-\chi \Omega X)^{-1} \Omega \vec S </math>

as a function of the properties of the physical memristive network and the external sources. The equation is valid for the case of the Williams-Strukov original toy model, as  in the case of ideal memristors, <math>\alpha=0</math>. However, the hypothesis of the existence of an ideal memristor is debatable.<ref>{{Cite journal |last=Abraham |first=Isaac |date=2018-07-20 |title=The case for rejecting the memristor as a fundamental circuit element |journal=Scientific Reports |language=en |volume=8 |issue=1 |page=10972 |doi=10.1038/s41598-018-29394-7 |issn=2045-2322 |pmc=6054652 |pmid=30030498|bibcode=2018NatSR...810972A }}</ref> In the equation above, <math>\alpha</math> is the "forgetting" time scale constant, typically associated to memory volatility, while <math>\chi=\frac{R_\text{off}-R_\text{on}}{R_\text{off}}</math> is the ratio of ''off'' and ''on'' values of the limit resistances of the memristors, <math> \vec S </math> is the vector of the sources of the circuit and <math>\Omega</math> is a projector on the fundamental loops of the circuit. The constant <math>\beta</math> has the dimension of a voltage and is associated to the properties of the memristor; its physical origin is the charge mobility in the conductor. The diagonal matrix and vector <math>X=\operatorname{diag}(\vec X)</math> and <math>\vec X</math> respectively, are instead the internal value of the memristors, with values between 0 and 1. This equation thus requires adding extra constraints on the memory values in order to be reliable.

It has been recently shown that the equation above exhibits tunneling phenomena and used to study [[Lyapunov function]]s.<ref>{{Cite book |last=Sheldon |first=Forrest |title=Collective Phenomena in Memristive Networks: Engineering phase transitions into computation |publisher=UC San Diego Electronic Theses and Dissertations |year=2018}}</ref><ref name="Caravelli 2021 022140" />