Editing PCI-X (section)

===PCI-X 2.0===
In 2003, the PCI SIG ratified PCI-X 2.0. It adds 266-MHz and 533-MHz variants, yielding roughly 2,132&nbsp;MB/s and 4,266&nbsp;MB/s throughput, respectively. PCI-X 2.0 makes additional protocol revisions that are designed to help system reliability and add [[Error-correcting code]]s to the bus to avoid re-sends.<ref name="PCI-SIG">{{cite web|url=http://www.pcisig.com/news_room/faqs/faq_20/|title=PCI-SIG&nbsp;— FAQ&nbsp;— PCI-X 2.0|access-date=2008-02-17|archive-date=2008-02-15|archive-url=https://web.archive.org/web/20080215215940/http://www.pcisig.com/news_room/faqs/faq_20/|url-status=dead}}</ref> To deal with one of the most common complaints of the PCI-X form factor, the 184-pin connector, 16-bit ports were developed to allow PCI-X to be used in devices with tight space constraints. Similar to PCI-Express, PtP functions were added to allow for devices on the bus to talk to each other without burdening the [[Central processing unit|CPU]] or bus controller.

Despite the various theoretical advantages of PCI-X 2.0 and its backward compatibility with PCI-X and PCI devices, it has not been implemented on a large scale ({{as of|2008|lc=y}}). This lack of implementation primarily is because hardware vendors have chosen to integrate [[PCI Express]] instead.

[[IBM]] was one of the (few) vendors which provided PCI-X 2.0 (266&nbsp;MHz) support in their [[IBM AS/400|System i5]] Model 515, 520 and 525; IBM advertised these slots as suitable for [[10 Gigabit Ethernet]] adapters, which they also provided.<ref>{{cite web|url=http://www.redbooks.ibm.com/redpapers/pdfs/redp4011.pdf|quote="A third generation of PCI is now offered with the introduction of the 1.9&nbsp;GHz System i5 Models 515, 520, and 525. These models have a PCI-X DDR (PCI-X&nbsp;2.0) slot that runs at a maximum of 266&nbsp;MHz and supports only adapters that can run without an IOP. This slot is ideally suited for ultra-high bandwidth adapters such as the new 266&nbsp;MHz (DDR) #5721/#5722 10 Gb Ethernet adapters."|page=7|title=PCI, PCI-X, PCI-X DDR, and PCIe Placement Rules for IBM System i Models}}</ref> [[Hewlett-Packard|HP]] offered PCI-X 2.0 in some [[ProLiant]] and [[HPE Integrity Servers|Integrity]] servers and offered dual-port 4&nbsp;Gbit/s [[Fibre Channel]] adapters, also operating at 266&nbsp;MHz.<ref>{{Cite web |url=http://h18004.www1.hp.com/products/quickspecs/12481_na/12481_na.PDF |title=HP FC2243 Dual Channel 4Gb PCI-X 2.0 HBA |access-date=2013-12-16 |archive-date=2013-12-16 |archive-url=https://web.archive.org/web/20131216060927/http://h18004.www1.hp.com/products/quickspecs/12481_na/12481_na.PDF |url-status=dead }}</ref> [[AMD]] supported PCI-X 2.0 (266&nbsp;MHz) via its 8132 [[Hypertransport]] to PCI-X 2.0 tunnel chip.<ref>{{cite web|url=http://www.theinquirer.net/inquirer/news/1016137/amd-rolls-out-8132-pci-x-tunnel-part |archive-url=https://web.archive.org/web/20131216104651/http://www.theinquirer.net/inquirer/news/1016137/amd-rolls-out-8132-pci-x-tunnel-part |url-status=unfit |archive-date=December 16, 2013 |title=AMD rolls out 8132 PCI-X tunnel part |publisher=The Inquirer |date=2004-06-14 |access-date=2014-02-13}}</ref><ref name="MuellerSoper2006">{{cite book|author1=Scott M. Mueller|author2=Mark Edward Soper|author3=Barrie Sosinsky|title=Upgrading and Repairing Servers|url=https://books.google.com/books?id=9cLFf_1PBnkC&pg=PT366|year=2006|publisher=Pearson Education|isbn=978-0-13-279698-9|page=366}}</ref> [[ServerWorks]] was a vocal supporter of PCI-X 2.0<ref>{{cite web |url=http://serverworks.com/technology/pdf/PCI-X_2-0_WhitePaper.pdf |title=Archived copy |website=serverworks.com |access-date=12 January 2022 |archive-url=https://web.archive.org/web/20030718015904/http://serverworks.com/technology/pdf/PCI-X_2-0_WhitePaper.pdf |archive-date=18 July 2003 |url-status=dead}}</ref> (to the detriment of the first generation PCI Express) particularly through its chief [[Raju Vegesna]],<ref>[http://www.eetimes.com/document.asp?doc_id=1144859 ServerWorks chief spurns first-generation PCI Express]</ref> who was however fired soon thereafter for roadmap disagreements with the Broadcom leadership.<ref>[http://news.cnet.com/Broadcom-ousts-ServerWorks-chief/2100-1006_3-994245.html Broadcom ousts ServerWorks chief]</ref>

In 2003, [[Dell]] announced it would skip PCI-X&nbsp;2.0 in favor of more rapid adoption of PCI Express solutions.<ref>[http://news.cnet.com/2100-1010-992769.html PCI-X marks the spot for IBM, HP]</ref> As reported by [[PC Magazine]], Intel began to sideline PCI-X in their 2004 roadmap, in favor of PCI Express, arguing that the latter had substantial advantages in terms of system latency and power consumption, more dramatically stated as avoiding "the 1,000-pin apocalypse" for their [[Intel Xeon chipsets#NetBurst-based Xeon chipsets|Tumwater]] chipset.<ref>[https://web.archive.org/web/20160304075654/https://www.pcmag.com/article2/0,2817,909447,00.asp Intel Begins Making Its Case Against PCI-X]</ref>