Editing Pentium II (section)

==={{Anchor|Deschutes}}Deschutes===
The ''Deschutes'' core Pentium II (80523), which debuted at 333&nbsp;MHz in January 1998, was produced with a 0.25 [[micrometre|μm]] process and has a significantly lower power draw.<ref name=sandpileP2 /> The die size is 113&nbsp;mm<sup>2</sup>. The 333&nbsp;MHz variant was the final Pentium II CPU that used the older 66&nbsp;MT/s [[front-side bus]]; all subsequent Deschutes-core models used a 100&nbsp;MT/s FSB. Later in 1998, Pentium IIs running at 266, 300, 350, 400, and 450&nbsp;MHz were also released.<ref name=sandpileP2/> The ''Deschutes'' core introduced FXSAVE and FXRSTOR instructions for fast FPU context save and restore.<ref>{{cite web|url=http://techweb.cmp.com/eet/news/98/995news/field.html |archive-url=https://web.archive.org/web/19981205135433/http://techweb.cmp.com/eet/news/98/995news/field.html |url-status=dead |archive-date=1998-12-05 |title=EE Times - News |access-date=2019-10-14}}</ref> Towards the end of its design life, Deschutes chips capable of 500&nbsp;MHz within Intel cooling and design specifications were produced. However, these were not marketed. Rather than destroy already multiplier-locked units, those Deschutes units that had been tested and locked with a multiplier of 5 were sold as being 333&nbsp;MHz. This was accomplished by disabling the 100&nbsp;MHz bus option. [[Overclockers]], upon learning of this, purchased the units in question and ran them well over 500&nbsp;MHz; most notably, when overclocking, the final batch of "333 MHz" CPUs were capable of speeds much higher than CPUs sold at 350, 400, or 450&nbsp;MHz.{{Citation needed|date=August 2012}}

Concurrent with the release of Deschutes cores supporting a 100&nbsp;MT/s front-side bus was Intel's release of the [[Intel 440BX|440BX]] ''Seattle'' chipset and its derivatives, the 440MX, 450NX, and 440ZX chipsets. Replacing the aged 66&nbsp;MHz FSB, which had been on the market since 1993, the 100&nbsp;MHz FSB resulted in solid performance improvements for the Pentium II lineup. Pentium II chips starting with 350&nbsp;MHz were released in both SECC and SECC2 form factors. Late Pentium IIs also marked the switch to [[flip-chip]] based packaging with direct heatsink contact to the die, as opposed to traditional bonding.

While ''Klamath'' features 4 cache chips and simulates dual-porting through interleaving (2x 64-bit) for a slight performance improvement on concurrent accesses, ''Deschutes'' only sports 2 cache chips and offers slightly lower L2 cache performance at the same clockspeed. Furthermore, ''Deschutes'' always features ECC-enabled L2 cache.<ref>{{cite journal |title=333: Pentium II, die Dritte|series=Trends & News |language=de |author-first1=Georg |author-last1=Schnurer |date=January 29, 1998 |journal=[[c't – magazin für computertechnik]] |volume=1998 |issue=3 |page=122 |publisher=[[Heise Verlag]] |url=https://www.heise.de/ct/artikel/333-Pentium-II-die-Dritte-286144.html |access-date=September 6, 2017 |url-status=live |archive-url=https://web.archive.org/web/20170222153434/https://www.heise.de/ct/artikel/333-Pentium-II-die-Dritte-286144.html |archive-date=February 22, 2017}}</ref>

[[File:Pentium II Xeon 450 512.jpg|thumb|right|Pentium II Xeon 450 MHz with 512&nbsp;KB cache. Cartridge cover has been removed.]]
The [[Pentium II Xeon]] was a high-end version of Deschutes core intended for use on [[workstation]]s and [[Server (computing)|server]]s. Principally, it used a different type of slot ([[Slot 2]]), case, board design, and more expensive full-speed custom L2 cache, which was off-die. Versions were produced with 512&nbsp;KB, 1&nbsp;MB or 2&nbsp;MB L2 caches by varying the number of 512&nbsp;KB chips incorporated on the board.<ref>Pabst, Thomas. [https://archive.today/20120919073858/http://www.tomshardware.com/1998/07/02/intel/ Intel's Pentium II Xeon Processor], Tom's Hardware, July 2, 1998.</ref>

[[File:KL Intel PPro Overdrive P6T Top.jpg|thumb|Pentium II Overdrive without heatsink. Deschutes core on left, cache on right]]

In Intel's "Family/Model/Stepping" scheme, Deschutes CPUs are family 6, model 5 and have the part number 80523.

====Pentium II OverDrive====
In 1998, the 0.25 μm Deschutes core was utilized in the creation of the [[Intel Pentium II Overdrive#Socket 8|Pentium II Overdrive]] processor, which was aimed at allowing corporate [[Pentium Pro]] users to upgrade their aging servers. Combining the Deschutes core in a [[flip-chip]] package with a 512&nbsp;KB full-speed L2 cache chip from the Pentium II Xeon into a [[Socket 8]]-compatible module resulted in a 300 or 333&nbsp;MHz processor that could run on a 60 or 66&nbsp;MHz front-side bus. This combination brought together some of the more attractive aspects of the Pentium II and the Pentium II Xeon: [[MMX (instruction set)|MMX]] support/improved 16-bit performance and full-speed L2 cache, respectively.<ref>[https://web.archive.org/web/*/http://www.heise.de/ct/english/98/18/020/ Wayback machine archive of Heise, accessed June 17, 2009]</ref> The later "Dixon" mobile Pentium II would emulate this combination with 256&nbsp;KB of full-speed cache.

In Intel's "Family/Model/Stepping" scheme, the Pentium II OverDrive CPU identifies itself as family 6, model 3, though this is misleading, as it is not based on the family 6/model 3 Klamath core. As mentioned in the Pentium II Processor update documentation from Intel, "although this processor has a CPUID of 163xh, it uses a Pentium II processor CPUID 065xh processor core."<ref>{{Cite web|date=July 2002 |url=http://download.intel.com/design/PentiumII/specupdt/24333749.pdf|title=Intel Pentium II Processor Specification Update|archive-url=https://web.archive.org/web/20110831012432/http://download.intel.com/design/PentiumII/specupdt/24333749.pdf|url-status=dead|archive-date=August 31, 2011}}</ref>