Editing Predication (computer architecture) (section)

==History==
Predicated instructions were popular in European computer designs of the 1950s, including the [[Mailüfterl]] (1955), the [[Z22 (computer)|Zuse Z22]] (1955), the [[ZEBRA (computer)|ZEBRA]] (1958), and the [[Electrologica X1]] (1958). The [[ACS-1|IBM ACS-1]] design of 1967 allocated a "skip" bit in its instruction formats, and the CDC Flexible Processor in 1976 allocated three conditional execution bits in its microinstruction formats.

[[Hewlett-Packard]]'s [[PA-RISC]] architecture (1986) had a feature called ''nullification'', which allowed most instructions to be predicated by the previous instruction. [[IBM]]'s [[IBM POWER instruction set architecture|POWER architecture]] (1990) featured conditional move instructions. POWER's successor, [[PowerPC]] (1993), dropped these instructions. [[Digital Equipment Corporation]]'s [[DEC Alpha|Alpha]] architecture (1992) also featured conditional move instructions. [[MIPS architecture|MIPS]] gained conditional move instructions in 1994 with the MIPS IV version; and [[SPARC]] was extended in Version 9 (1994) with conditional move instructions for both integer and floating-point registers.

In the [[Hewlett-Packard]]/[[Intel]] [[IA-64]] architecture, most instructions are predicated. The predicates are stored in 64 special-purpose predicate [[processor register|registers]]; and one of the predicate registers is always true so that ''unpredicated'' instructions are simply instructions predicated with the value true. The use of predication is essential in IA-64's implementation of [[software pipelining]] because it avoids the need for writing separated code for prologs and epilogs.{{clarify|date=March 2014}}

In the [[x86]] architecture, a family of conditional move instructions (<code>CMOV</code> and <code>FCMOV</code>) were added to the architecture by the [[Intel]] [[Pentium Pro]] (1995) processor. The <code>CMOV</code> instructions copied the contents of the source register to the destination register depending on a predicate supplied by the value of the flag register.

In the [[ARM architecture]], the original 32-bit instruction set provides a feature called ''conditional execution'' that allows most instructions to be predicated by one of 13 predicates that are based on some combination of the four condition codes set by the previous instruction. ARM's [[ARM architecture#Thumb|Thumb]] instruction set (1994) dropped conditional execution to reduce the size of instructions so they could fit in 16 bits, but its successor, [[ARM architecture#Thumb-2|Thumb-2]] (2003) overcame this problem by using a special instruction which has no effect other than to supply predicates for the following four instructions. The 64-bit instruction set introduced in ARMv8-A (2011) replaced conditional execution with conditional selection instructions.