Editing Prefetch input queue (section)

==Drawbacks==

Processors implementing the instruction queue prefetch algorithm are rather technically advanced. The [[CPU design]] level complexity of the such processors is much higher than for regular processors. This is primarily because of the need to implement two separate units, the [[Bus (computing)|BIU]] and [[Execution unit|EU]], operating separately.

As the complexity of these chips increases, the cost also increases. These processors are relatively costlier than their counterparts without the prefetch input queue.

However, these disadvantages are greatly offset by the improvement in processor execution time. After the introduction of prefetch instruction queue in the 8086 processor, all successive processors have incorporated this feature.