Editing Processor power dissipation (section)

== Clock frequencies and multi-core chip designs ==
Historically, processor manufacturers consistently delivered increases in [[clock rate]]s and [[instruction-level parallelism]], so that single-threaded code executed faster on newer processors with no modification.<ref>{{cite journal |first=Herb |last=Sutter |url=http://www.gotw.ca/publications/concurrency-ddj.htm |title=The Free Lunch Is Over: A Fundamental Turn Toward Concurrency in Software |journal=[[Dr. Dobb's Journal]] |volume=30 |issue=3 |date=2005}}</ref>  More recently, in order to manage CPU power dissipation, processor makers favor [[multi-core]] chip designs, thus software needs to be written in a [[multi-threaded]] or multi-process manner to take full advantage of such hardware.  Many multi-threaded development paradigms introduce overhead, and will not see a linear increase in speed when compared to the number of processors.  This is particularly true while accessing shared or dependent resources, due to [[Lock (computer science)|lock]] contention.  This effect becomes more noticeable as the number of processors increases.

Recently, IBM has been exploring ways to distribute computing power more efficiently by mimicking the distributional properties of the human brain.<ref>{{cite news |last=Johnson |first=R. Colin |url=http://www.eetimes.com/electronics-news/4218883/IBM-demos-cognitive-computer-chips |title=IBM demos cognitive computer chips |work=[[EE Times]] |date=2011-08-18 |access-date=2011-10-01}}</ref>