Editing Register-transfer level (section)

===Motivation===
It is well known that more significant power reductions are possible if optimizations are made on levels of abstraction, like the architectural and algorithmic level, which are higher than the circuit or gate level <ref>[http://www.eecg.toronto.edu/~najm/papers/iccad95-tutorial.pdf "Power Estimation Techniques for Integrated Circuits "]</ref> This provides the required motivation for the developers to focus on the development of new architectural level power analysis tools. This in no way implies that lower level tools are unimportant. Instead, each layer of tools provides a foundation upon which the next level can be built. The abstractions of the estimation techniques at a lower level can be used on a higher level with slight modifications.