Editing Resistor–transistor logic (section)

=== Multi-transistor RTL NOR gate ===
[[File:RTL 3-Input NOR Gate.svg|right|thumb|300px|Schematic of a multi-transistor RTL NOR gate, as used in the [[Apollo Guidance Computer]] integrated circuits.<ref name=AGC2005011>[[Apollo Guidance Computer]] schematics, [http://klabs.org/history/ech/agc_schematics/logic/5011-1.jpg Dwg. No. 2005011].</ref>]]
[[File:Agc nor2.jpg|right|thumb|300px|Photograph of the dual 3-input NOR gate chip used to build the [[Apollo Guidance Computer]]. Connections (clockwise from top center) ground, inputs (3), output, power (V<sub>cc</sub>), output, inputs (3). The six transistors (two groups of three) are in the center. The thin wires from the terminals to the transistors are resistors. ]]
[[File:Agc flatp.jpg|thumb|right|[[Flatpack (electronics)|Flatpack]] RTL NOR gate integrated circuits in the [[Apollo guidance computer]] ]]

The limitations of the one-transistor RTL NOR gate are overcome by the multi-transistor RTL implementation. It consists of a set of parallel-connected transistor switches driven by the logic inputs (see the figure on the right). In this configuration, the inputs are completely separated and the number of inputs is limited only by the small leakage current of the cut-off transistors at output logical "1". The same idea was used later for building [[Direct-coupled transistor logic|DCTL]], [[Emitter-coupled logic|ECL]], some [[Transistor-transistor logic|TTL]] (7450, 7460), [[NMOS logic|NMOS]] and [[CMOS]] gates.