Editing SystemC (section)

== Language features ==

=== Modules ===
SystemC has a notion of a container class called a module. This is a hierarchical entity that can have other modules or processes contained in it.

Modules are the basic building blocks of a SystemC design hierarchy. A SystemC model usually consists of several modules which communicate via ports. The modules can be thought of as a building block of SystemC.

=== Ports ===
Ports allow communication from inside a module to the outside (usually to other modules) via channels.

=== Signals ===
SystemC supports resolved and unresolved signals. Resolved signals can have more than one driver (a bus) while unresolved signals can have only one driver.

=== Exports ===
Modules have ports through which they connect to other modules. SystemC supports single-direction and bidirectional ports.

Exports incorporate channels and allow communication from inside a module to the outside (usually to other modules).

=== Processes ===
Processes are used to describe functionality. Processes are contained inside modules. SystemC provides three different process abstractions{{which|date=May 2019}} to be used by hardware and software designers. Processes are the main computation elements. They are concurrent.

=== Channels ===
Channels are the communication elements of SystemC. They can be either simple wires or complex communication mechanisms like [[FIFO (computing and electronics)|FIFO]]s or [[Bus (computing)|bus channel]]s.

Elementary channels:
* signal: the equivalent of a wire
* buffer
* fifo
* mutex
* semaphore

=== Interfaces ===
Ports use interfaces to communicate with channels.

=== Events ===
Events allow synchronization between processes and must be defined during initialization.

=== Data types ===
SystemC introduces several data types which support the modeling of hardware.

Extended standard types:
* {{code|sc_int<n>}}      ''n''-bit signed integer
* {{code|sc_uint<n>}}      ''n''-bit unsigned integer
* {{code|sc_bigint<n>}}    ''n''-bit signed integer for ''n'' > 64
* {{code|sc_biguint<n>}}   ''n''-bit unsigned integer for ''n'' > 64

Logic types:
* {{code|sc_bit}}         2-valued single bit
* {{code|sc_logic}}       4-valued single bit
* {{code|sc_bv<n>}}        vector of length ''n'' of sc_bit
* {{code|sc_lv<n>}}        vector of length ''n'' of sc_logic

Fixed point types:
* {{code|sc_fixed<>}}     templated signed fixed point
* {{code|sc_ufixed<>}}    templated unsigned fixed point
* {{code|sc_fix}}         untemplated signed fixed point
* {{code|sc_ufix}}        untemplated unsigned fixed point