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Systolic array
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==Classification controversy== While systolic arrays are officially classified as [[Multiple instruction, single data|MISD]], their classification is somewhat problematic. Because the input is typically a vector of independent values, the systolic array is definitely not [[Single instruction, single data|SISD]]. Since these [[input (computer science)|input]] values are merged and combined into the result(s) and do not maintain their [[independence]] as they would in a [[Single instruction, multiple data|SIMD]] vector processing unit, the [[array data structure|array]] cannot be classified as such. Consequently, the array cannot be classified as a [[Multiple instruction, multiple data|MIMD]] either, because MIMD can be viewed as a mere collection of smaller SISD and [[Single instruction, multiple data|SIMD]] machines. Finally, because the data [[swarm]] is transformed as it passes through the array from [[Node (computer science)|node]] to node, the multiple nodes are not operating on the same data, which makes the MISD classification a [[misnomer]]. The other reason why a systolic array should not qualify as a '''MISD''' is the same as the one which disqualifies it from the SISD category: The input data is typically a vector not a '''s'''ingle '''d'''ata value, although one could argue that any given input vector is a single item of data. In spite of all of the above, systolic arrays are often offered as a classic example of MISD architecture in textbooks on [[parallel computing]] and in engineering classes. If the array is viewed from the outside as [[atomic operation|atomic]] it should perhaps be classified as '''SFMuDMeR''' = single function, multiple data, merged result(s). Systolic arrays use a pre-defined computational flow graph that connects their nodes. [[Kahn process networks]] use a similar flow graph, but are distinguished by the nodes working in lock-step in the systolic array: in a Kahn network, there are FIFO queues between each node.
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