Editing Transputer (section)

=== Links ===
The basic design of the transputer included [[serial link]]s known as "os-link"s<ref name="tanaka">
Kazuto Tanaka; Satoshi Iwanami; Takeshi Yamakawa; Chikara Fukunaga; Kazuto Matsui; Takashi Yoshida.
[http://www.comp.tmu.ac.jp/morbier/work/componenttanaka.pdf "The Design and Performance of SpaceWire Router-network using CSP"].
p. 2.
</ref><ref>
[https://books.google.com/books?id=uibU5GzqHjEC "High-Performance Computing and Networking: International Conference and Exhibition, Amsterdam, the Netherlands, April 21-23, 1998 Proceedings"].
B C O'Neill; G Coulson; K L Wong; R Hotchkiss; J H Ng; S Clark; and P D Thomas.
"An Interface Device to Support a Distributed Parallel System for the StrongARM Microprocessor".
p. 1031.
</ref> that allowed it to communicate with up to four other transputers, each at 5, 10, or 20&nbsp;Mbit/s &ndash; which was very fast for the 1980s. Any number of transputers could be connected together over links (which could run tens of metres) to form one computing ''farm''. A hypothetical desktop machine might have two of the "low end" transputers handling [[input/output]] (I/O) tasks on some of their serial lines (hooked up to appropriate hardware) while they talked to one of their larger cousins acting as a [[central processing unit|CPU]] on another.

There were limits to the size of a system that could be built in this fashion. Since each transputer was linked to another in a fixed point-to-point layout, sending messages to a more distant transputer required that messages be relayed by each chip in the line. This introduced a delay with every "hop" over a link, leading to long delays on large nets. To solve this problem Inmos also provided a zero-delay switch that connected up to 32 transputers (or switches) into even larger networks.