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====Related standards==== * IEEE 1076.1 VHDL Analog and Mixed-Signal ([[VHDL-AMS]]) * IEEE 1076.1.1 VHDL-AMS Standard Packages (stdpkgs) * IEEE 1076.2 VHDL Math Package * IEEE 1076.3 VHDL Synthesis Package (vhdlsynth) ([[numeric std]]) * IEEE 1076.3 VHDL Synthesis Package β Floating Point (fphdl) * IEEE 1076.4 Timing (VHDL Initiative Towards ASIC Libraries: vital) * IEEE 1076.6 VHDL Synthesis Interoperability (withdrawn in 2010)<ref>{{Cite web|url=https://standards.ieee.org/ieee/1076.6/3466/|title = IEEE 1076.6-2004 - IEEE Standard for VHDL Register Transfer Level (RTL) Synthesis}}</ref> * [[IEEE 1164]] VHDL Multivalue Logic (std_logic_1164) Packages
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