Editing Zilog Z8000 (section)

===Introduction===
In June 1978, while Shima was still working on the design of the Z8000, Intel introduced the [[Intel 8086]]. Zilog had missed its chance to be the first company with a new, dedicated 16-bit design. In some ways the 8086 was similar to the Z8000, including the use of segmented memory, but in general it was a less advanced design with fewer [[processor register]]s and a much smaller maximum memory of 1&nbsp;[[megabyte]] rather than the 8000's 8&nbsp;MB.{{sfn|Slater|2007|p=9}}

It was not until early 1979 that production samples of the Z8000 were released. Zilog stated that the Z8001 and Z8002 were merely differently packaged versions of the same Z8000 chip, "the difference being achieved by a bonding option during manufacture".<ref name="pcw198107_zilog">{{ cite magazine | url=https://archive.org/details/PersonalComputerWorld1981-07/page/62/mode/2up | title=Zilog writes | magazine=Personal Computer World | last1=Pittman | first1=Phil | date=July 1981 | access-date=13 May 2024 | pages=62–63 }}</ref>

Even with 48 pins, there were not enough connections to allow for a complete 16-bit data bus and 24-bit address bus, as that would leave only 8 free pins, which is not nearly enough for various other interfacing needs like power, clocks and interrupts. To address this, the Z8001 multiplexed the address and data pins together. The first 16 pins of the 23-pin address bus were used on alternate cycles as a 16-bit data bus. This meant that every memory access took two complete memory cycles: first the address would be presented and had to be "latched" using external circuity, and then on the next cycle 16 bit of data would be read or written using the same pins.<ref>{{cite tech report |url=https://html.alldatasheet.net/html-pdf/1283758/ZILOG/Z8000/172/1/Z8000.html |title=Z8000}}</ref> This means the Z8000 would run roughly half as fast as something like the 68000, which had separate 16 data pins and 24 address pins on a larger 64-pin chip.{{Dubious|1=Multiplexed bus|reason=Multiplexed address/data bus does not necessarily slow down accesses. The address must be presented some time before the data can be read or written. The moment the address appears, the data bus is idle on most processors including the 68000.|date=March 2025}}

Zilog already had a strategy to deal with this problem, the Zilog 8010 memory controller. The 8010 automatically folded the 7 and 16-bit parts of the address back together into a single 23-bit address, as well as offering a number of memory mapping features that made it useful for supporting [[Computer multitasking|multitasking]] and [[virtual memory]]. However, the 8010 was not ready when the 8001 was introduced. This meant that for 18 months, Intel had a single-chip solution that could access 1&nbsp;MB, while the 8000 series was still practically limited to 64&nbsp;kB. The 8010 was eventually released almost a year later, and even then it required two chips to do what the 8086 did with one.{{sfn|Slater|2007|pp=7,8}}

The delays with the 8010 was particularly hurtful. In September 1979, [[Motorola]] introduced the [[Motorola 68000]], which had a complete 24-bit address bus, which allowed it to access up to 16&nbsp;MB without segmentation. It also offered all of the features Zilog advertised as being more advanced than the 8086, such as more registers and a wide set of addressing modes. The market generally chose Intel for lower-end offerings and the 68000 for the high-end. Shima left the company to return to Japan in 1980, and Faggin left shortly thereafter.{{sfn|Slater|2007|p=23}}