Editing CPU cache (section)

===Tag RAM===
[[File:Medion 9901 - Intel Pentium III SL35E - TagRAM chip SL3F5-1387.jpg|thumb|Tag RAM on board of a [[Pentium III|Intel Pentium III]] ]]
In computer engineering, a ''tag RAM'' is used to specify which of the possible memory locations is currently stored in a CPU cache.<ref>{{cite web
 | url = http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0363g/Chdijaed.html
 | title = Cortex-R4 and Cortex-R4F Technical Reference Manual
 | access-date = 2013-09-28
 | publisher = arm.com
}}</ref><ref>{{cite web
 | url = http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0284g/Ebddefci.html
 | title = L210 Cache Controller Technical Reference Manual
 | access-date = 2013-09-28
 | publisher = arm.com
}}</ref> For a simple, direct-mapped design fast [[static random-access memory|SRAM]] can be used. Higher [[#Associativity|associative caches]] usually employ [[content-addressable memory]].