Editing ARM architecture family (section)

=={{anchor|64-bit|AArch64}}64/32-bit architecture==
{{Main|AArch64}}
[[File:ARMCortexA57A53.jpg|thumb|Armv8-A Platform with Cortex A57/A53 MPCore big.LITTLE CPU chip]]

===Armv8===

===={{anchor|ARM8-A|Armv8-A}}Armv8-A====
{{See also|Comparison of Armv8-A processors}}
Announced in October 2011,<ref name="armv8-a-announcement"/> '''Armv8-A''' (often called ARMv8 while the Armv8-R is also available) represents a fundamental change to the ARM architecture. It supports two ''execution states'': a 64-bit state named ''AArch64'' and a 32-bit state named ''AArch32''. In the AArch64 state, a new 64-bit ''A64'' instruction set is supported; in the AArch32 state, two instruction sets are supported: the original 32-bit instruction set, named ''A32'', and the 32-bit Thumb-2 instruction set, named ''T32''. AArch32 provides [[user space|user-space]] compatibility with Armv7-A. The processor state can change on an Exception level change; this allows 32-bit applications to be executed in AArch32 state under a 64-bit OS whose kernel executes in AArch64 state, and allows a 32-bit OS to run in AArch32 state under the control of a 64-bit [[hypervisor]] running in AArch64 state.<ref name="v8arch"/> ARM announced their Cortex-A53 and Cortex-A57 cores on 30 October 2012.<ref name="cortex-a50 announce">{{cite press release |url=https://www.arm.com/about/newsroom/arm-launches-cortex-a50-series-the-worlds-most-energy-efficient-64-bit-processors.php |title=ARM Launches Cortex-A50 Series, the World's Most Energy-Efficient 64-bit Processors |publisher=[[Arm Holdings]] |access-date=31 October 2012}}</ref> Apple was the first to release an Armv8-A compatible core in a consumer product  ([[Apple A7]] in [[iPhone 5S]]). [[AppliedMicro]], using an [[FPGA]], was the first to demo Armv8-A.<ref name="AppliedMicro-First 64-bit ARM v8 Core">{{cite press release |url=https://www.businesswire.com/news/home/20111027006673/en/AppliedMicro-Showcases-World's-64-bit-ARM-v8-Core |title=AppliedMicro Showcases World's First 64-bit ARM v8 Core |publisher=AppliedMicro |date=28 October 2011 |access-date=11 February 2014}}</ref> The first Armv8-A [[system on a chip|SoC]] from [[Samsung Electronics|Samsung]] is the Exynos 5433 used in the [[Samsung Galaxy Note 4|Galaxy Note 4]], which features two clusters of four Cortex-A57 and Cortex-A53 cores in a [[ARM big.LITTLE|big.LITTLE]] configuration; but it will run only in AArch32 mode.<ref>{{cite web |title=Samsung's Exynos 5433 is an A57/A53 ARM SoC |website=[[AnandTech]] |url=https://www.anandtech.com/show/8537/samsungs-exynos-5433-is-an-a57a53-arm-soc |access-date=17 September 2014}}</ref>

To both AArch32 and AArch64, Armv8-A makes VFPv3/v4 and advanced SIMD (Neon) standard. It also adds cryptography instructions supporting [[Advanced Encryption Standard|AES]], [[SHA-1]]/[[SHA-256]] and [[finite field arithmetic]].<ref>{{cite web |title=ARM Cortex-A53 MPCore Processor Technical Reference Manual: Cryptography Extension |url=http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0500e/CJHDEBAF.html |publisher=ARM |access-date=11 September 2016}}</ref> AArch64 was introduced in Armv8-A and its subsequent revision.  AArch64 is not included in the 32-bit Armv8-R and Armv8-M architectures.

An ARMv8-A processor can support one or both of AArch32 and AArch64; it may support AArch32 and AArch64 at lower Exception levels and only AArch64 at higher Exception levels.<ref name="Execution-state-and-Exception-levels">{{cite web|url=https://developer.arm.com/documentation/102412/0103/Execution-and-Security-states/Impact-of-implemented-Exception-levels|title=Impact of implemented Exception levels|work=Learn the architecture - AArch64 Exception Model|publisher=Arm}}</ref> For example, the ARM Cortex-A32 supports only AArch32,<ref>{{cite web|url=https://developer.arm.com/Processors/Cortex-A32|title=Cortex-A32|website=Arm Developer}}</ref> the [[ARM Cortex-A34]] supports only AArch64,<ref>{{cite web|url=https://developer.arm.com/Processors/Cortex-A34|title=Cortex-A34|website=Arm Developer}}</ref> and the [[ARM Cortex-A72]] supports both AArch64 and AArch32.<ref>{{cite web|url=https://developer.arm.com/Processors/Cortex-A72|title=Cortex-A72|website=Arm Developer}}</ref> An ARMv9-A processor must support AArch64 at all Exception levels, and may support AArch32 at EL0.<ref name="Execution-state-and-Exception-levels" />

===={{anchor|ARM8-R}}Armv8-R====
Optional AArch64 support was added to the Armv8-R profile, with the first ARM core implementing it being the Cortex-R82.<ref>{{cite news |last=Frumusanu |first=Andrei |date=September 3, 2020 |url=https://www.anandtech.com/show/16056/arm-announces-cortexr82-first-64bit-real-time-processor |title=ARM Announced Cortex-R82: First 64-bit Real Time Processor |website=[[AnandTech]]}}</ref> It adds the A64 instruction set.

===Armv9===

===={{anchor|ARM9-A|Armv9-A}}Armv9-A====
Announced in March 2021, the updated architecture places a focus on secure execution and [[Compartmentalization (engineering)|compartmentalisation]].<ref>{{cite news |last=Frumusanu |first=Andrei |date=March 30, 2021 |url=https://www.anandtech.com/show/16584/arm-announces-armv9-architecture |title=Arm Announces Armv9 Architecture: SVE2, Security, and the Next Decade |website=[[AnandTech]]}}</ref><ref>{{cite press release |last=Harrod |first=Alex |date=March 30, 2021 |url=https://newsroom.arm.com/news/arms-solution-to-the-future-needs-of-ai-security-and-specialized-computing-is-v9 |title=Arm's Solution to the Future Needs of AI, Security and Specialized Computing is v9 |publisher=[[Arm Holdings]]}}</ref> The first ARMv9-A processors were released later that year, including the Cortex-A510, Cortex-A710 and Cortex-X2.