Editing 1-Wire (section)

== Example communication with a device ==
The following signals were generated by an [[Field-programmable gate array|FPGA]], which was the master for the communication with a DS2432 ([[EEPROM]]<!-- 1k-Bit Protected 1-Wire EEPROM with SHA-1 Engine -->) chip, and measured with a logic analyzer. A logic high on the 1-Wire output, means the output of the FPGA is in tri-state mode and the 1-Wire device can pull the bus low. A low means the FPGA pulls down the bus. The 1-Wire input is the measured bus signal. On input sample time high, the FPGA samples the input for detecting the device response and receiving bits.

[[File:1-Wire-Protocol.png]]