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Cray X-MP
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==Successors== The [[Cray-2]], a completely new design, was introduced in 1985. A very different compact four-processor design with from 64 MW (megaword) to 512 MW (512 MB to 4 GB) of main memory, it was specified to 500 MFLOPS but was slower than the X-MP on certain calculations due to its high memory latency<!--Do not link to "RAM latency", which pertains to the latency of SDRAM, which the CRAY-2 did not use-->. The [[Cray Y-MP]] upgrade of the X-MP series was announced in 1988; it also had a new design, replacing the 16-gate ECL [[gate array]]s with a more compact [[VLSI]] gate array with larger circuit boards. It was a major improvement of the X-MP supporting up to eight processors.
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