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Data General Nova
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===SuperNOVA=== Ken Olsen had publicly predicted that DG would fail, but with the release of the Nova it was clear that was not going to happen. By this time, a number of other companies were talking about introducing 16-bit designs as well. Olsen decided these presented a threat to their 18-bit line as well as 12-bit, and began a new 16-bit design effort.{{sfn|Hendrie|2002|p=53}} This emerged in 1970 as the [[PDP-11]], a much more complex design that was as different from the PDP-X as the Nova was. The two designs competed heavily in the market.{{sfn|Supnik|2004}} Rumors of the new system from DEC reached DG shortly after the Nova began shipping. In spring 1970 they hired a new designer, Larry Seligman, to leapfrog any possible machine in the making. Two major changes had taken place since the Nova was designed; one was that [[Signetics]] had introduced the 8260, a 4-bit IC that combined an adder, XNOR and AND, meaning the number of chips needed to implement the basic logic was reduced by about three times. Another was that [[Intel]] was aggressively talking up semiconductor-based memories, promising 1024 bits on a single chip and running at much higher speeds than core memory.{{sfn|Hendrie|2002|p=53}} Seligman's new design took advantage of both of these improvements. To start, the new ICs allowed the ALU to be expanded to full 16-bit width on the same two cards, allowing it to carry out math and logic operations in a single cycle and thereby making the new design four times as fast as the original. In addition, new smaller core memory was used that improved the cycle time from the original's 1,200 ns to 800 ns, offering a further {{sfrac|3}} improvement. Performance could be further improved by replacing the core with [[read-only memory]]; lacking core's read–write cycle, this could be accessed in 300 ns for a dramatic performance boost.<ref name=supernova>{{cite web |url=http://s3data.computerhistory.org/brochures/datageneral.novasupernova.1970.102646153.pdf |archive-url=https://web.archive.org/web/20191211155612/http://s3data.computerhistory.org/brochures/datageneral.novasupernova.1970.102646153.pdf |archive-date=2019-12-11 |url-status=live |website=Computer History Museum |title=SUPER NOVA |date=1970}}</ref> The resulting machine, known as the '''SuperNOVA''', was released in 1970. Although the initial models still used core, the entire design was based on the premise that faster semiconductor memories would become available and the platform could make full use of them. This was introduced later the same year as the '''SuperNOVA SC''', featuring semiconductor (SC) memory. The much higher performance memory allowed the CPU, which was synchronous with memory, to be further increased in speed to run at a 300 ns cycle time (3.3 MHz). This made it the fastest available minicomputer for many years.<ref>{{cite web |website=Clemson University |title=Data General History / Background |url=https://people.cs.clemson.edu/~mark/330/eagle.html}}</ref> Initially the new memory was also very expensive and ran hot, so it was not widely used.{{sfn|Hendrie|2002|p=54}}
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