Editing Distributed shared memory (section)

==Directory memory coherence==
{{main|Directory-based cache coherence}}
[[Memory coherence]] is necessary such that the system which organizes the DSM is able to track and maintain the state of data blocks in nodes across the memories comprising the system. A directory is one such mechanism which maintains the state of cache blocks moving around the system.

=== States ===
[[File:Dsm states.png|right|280px|State diagram of a block of memory in a DSM. A block is "owned" if one of the nodes has the block in state EM.]]

A basic DSM will track at least three states among nodes for any given block in the directory.<ref>{{Cite book|title=Fundamentals of Parallel Multicore Architecture|last=Solihin|first=Yan|publisher=Chapman and Hall/CRC|year=2015|isbn=9781482211184|location=Boca Raton, Florida|pages=339–340}}</ref> There will be some state to dictate the block as uncached (U), a state to dictate a block as exclusively owned or modified owned (EM), and a state to dictate a block as shared (S). As blocks come into the directory organization, they will transition from U to EM (ownership state) in the initial node. The state can transition to S when other nodes begin reading the block.

There are two primary methods for allowing the system to track where blocks are cached and in what condition across each node. Home-centric request-response uses the home to service requests and drive states, whereas requester-centric allows each node to drive and manage its own requests through the home.

=== Home-centric request and response ===
In a home-centric system, the DSM will avoid having to handle request-response races between nodes by allowing only one transaction to occur at a time until the home node has decided that the transaction is finished—usually when the home has received every responding processor's response to the request.  An example of this is Intel's [[Intel QuickPath Interconnect|QPI]] home-source mode.<ref name=":0">{{cite book
| last1 = Sorin
| last2 = Hill
| last3 = Wood
| first1 = Daniel J.
| first2 = Mark D.
| first3 = David A.
| title = A Primer on Memory Consistency and Cache Coherence
| publisher = Morgan & Claypool
| year = 2011
| page = 174
| isbn = 978-16-0845564-5
}}</ref> The advantages of this approach are that it's simple to implement but its request-response strategy is slow and buffered due to the home node's limitations.

=== Requester-centric request and response ===
In a requester-centric system, the DSM will allow nodes to talk at will to each other through the home. This means that multiple nodes can attempt to start a transaction, but this requires additional considerations to ensure coherence. For example: when one node is processing a block, if it receives a request for that block from another node it will send a NAck (Negative Acknowledgement) to tell the initiator that the processing node can't fulfill that request right away. An example of this is Intel's QPI snoop-source mode.<ref name=":0" /> This approach is fast but it does not naturally prevent race conditions and generates more bus traffic.