Editing Emitter-coupled logic (section)

== {{anchor|power_supply}}Power supplies and logic levels ==
{{anchor|logic_levels}}
ECL circuits usually operate with negative power supplies (positive end of the supply is connected to ground).{{r|p=5|TND309}} (Other logic families ground the negative end of the power supply.) This is done mainly to minimize the influence of the power supply variations on the logic levels. ECL is more sensitive to noise on the V<sub>CC</sub> and is relatively immune to noise on V<sub>EE</sub>.<ref>{{cite book |url=https://books.google.com/books?id=c2YxCCaM9RIC&pg=PA163 |title=Electronic Materials Handbook: Packaging |page=163 |first=Merrill L. |last=Minges |author2=ASM International. Handbook Committee|date=1989 |publisher=ASM International |isbn=9780871702852 }}</ref> Because ground should be the most stable voltage in a system, ECL is specified with a positive ground. In this connection, when the supply voltage varies, the voltage drops across the collector resistors change slightly (in the case of emitter constant current source, they do not change at all). As the collector resistors are firmly "tied up" to ground, the output voltages "move" slightly (or not at all). If the negative end of the power supply was grounded, the collector resistors would be attached to the positive rail.{{r|p=5|TND309}} As the constant voltage drops across the collector resistors change slightly (or not at all), the output voltages follow the supply voltage variations and the two circuit parts act as constant current level shifters. In this case, the voltage divider R1-R2 compensates the voltage variations to some extent. The positive power supply has another disadvantage — the output voltages will vary slightly (±0.4 V) against the background of high constant voltage (+3.9 V). Another reason for using a negative power supply is protection of the output transistors from an accidental short circuit developing between output and ground<ref>{{cite book |url=https://books.google.com/books?id=dnq3HmDN1ZAC&pg=RA1-PA110 |title=Modern digital electronics  |first=R.P. |last=Jain |date=2003 |page=111|publisher=McGraw-Hill Education (India) Pvt Limited |isbn=9780070494923 }}</ref> (but the outputs are not protected from a short circuit with the negative rail).

The value of the supply voltage is chosen so that sufficient current flows through the compensating diodes D1 and D2 and the voltage drop across the common emitter resistor R<sub>E</sub> is adequate.

ECL circuits available on the open market usually operated with logic levels incompatible with other families. This meant that interoperation between ECL and other logic families, such as the popular [[Transistor-transistor logic|TTL]] family, required additional interface circuits.  The fact that the high and low logic levels are relatively close meant that ECL suffers from small noise margins, which can be troublesome.

At least one manufacturer, [[IBM]], made ECL circuits for use in the manufacturer's own products. The power supplies were substantially different from those used in the open market.<ref name=barish>{{cite journal | author=A. E. Barish | title=Improved performance of IBM Enterprise System/9000 bipolar logic chips | journal=IBM Journal of Research and Development | year=1992 | volume=36 | issue=5 | url=http://domino.watson.ibm.com/tchjr/journalindex.nsf/0/3f9af3392b4530f985256bfa0067fa2e?OpenDocument | pages= 829&ndash;834 | doi=10.1147/rd.365.0829|display-authors=etal| url-access=subscription }}
</ref>

===PECL===
{| class="wikitable" style="float:right; margin-left: 1em;
|+Logic levels for Motorolla ECL/PEC comparison<ref>{{cite web |last=Holland |first=Nick |date=December 2002 |title=Interfacing Between LVPECL, VML, CML and LVDS Levels |url=http://focus.ti.com/lit/an/slla120/slla120.pdf |work=Application Report |publisher=Texas Instruments |id=SLLA120}}</ref>{{r|TND309|p=5}}{{anchor|logic_levels_comparison}}
! Type
! V<sub>ee</sub>
! {{Abbr|V<sub>low</sub>|Logic level LOW (0)}}
! {{Abbr|V<sub>high</sub>|Logic level HIGH (1)}}
!{{Abbr|V<sub>swing</sub>|Logic level swing - difference between V_high and V_low}}
! V<sub>cc</sub>
!{{Abbr|V<sub>cm</sub>|cm - common mode voltage range.}}
|-
!ECL
|–5.2 V
|–1.75 V
|–0.9 V
|–0.85 V
|GND
|
|-
! PECL
| GND
| 3.4 V
| 4.2 V
|0.8 V
| 5.0 V
|
|-
! LVPECL
| GND
| 1.6 V
| 2.4 V
|0.8 V
| 3.3 V
| 2.0 V
|}

'''Positive emitter-coupled logic''', also called '''pseudo-ECL''', (PECL) is a further development of ECL using a positive 5&nbsp;V supply instead of a negative 5.2&nbsp;V supply.<ref>{{cite web |work=EE Times |first=John |last=Goldie |url=http://www.eetimes.com/document.asp?doc_id=1225744 |title=LVDS, CML, ECL – differential interfaces with odd voltages |date=January 21, 2003}}</ref>  Low-voltage positive emitter-coupled logic (LVPECL) is a power-optimized version of PECL, using a positive 3.3&nbsp;V instead of 5&nbsp;V supply. PECL and LVPECL are differential-signaling systems and are mainly used in high-speed and clock-distribution circuits.

A common misconception is that PECL devices are slightly different from ECL devices.
In fact, every ECL device is also a PECL device.<ref>
{{cite web |first1=Cleon |last1=Petty |first2=Todd |last2=Pearson
|url=https://www.onsemi.com/pub/Collateral/AN1406-D.PDF |title=Designing with PECL (ECL at +5.0 V) |id=AN1406-D
|page=3}}
</ref>