Editing Field-programmable gate array (section)

====Design starts====
A ''design start'' is a new custom design for implementation on an FPGA.
* 2005: 80,000<ref name="designstarts">Dylan McGrath, ''EE Times'', "[http://www.eetimes.com/conf/dac/showArticle.jhtml?articleID=164302400 Gartner Dataquest Analyst Gives ASIC, FPGA Markets Clean Bill of Health]". June 13, 2005. Retrieved February 5, 2009.</ref>
* 2008: 90,000<ref name="eweekly">{{cite web|url=http://www.xilinx.com/support/documentation/data_sheets/ds112.pdf |archive-url=https://web.archive.org/web/20071122080100/http://www.xilinx.com/support/documentation/data_sheets/ds112.pdf |archive-date=2007-11-22 |url-status=live|title=Virtex-4 Family Overview|website=xilinx.com|access-date=14 April 2018}}</ref>