Editing IBM 7030 Stretch (section)

==Architecture==
===Data formats===
*[[Fixed-point arithmetic|Fixed-point number]]s are variable in length, stored in either binary (1 to 64 bits) or decimal (1 to 16 digits) and either unsigned format or [[Computer number format|sign/magnitude format]]. Fields may straddle word boundaries. In decimal format, digits are variable length bytes (four to eight bits).
*[[Floating-point]] numbers have a 1-bit exponent flag, a 10-bit exponent, a 1-bit exponent sign, a 48-bit magnitude, and a 4-bit sign byte in sign/magnitude format.
*Alphanumeric characters are variable length and can use any character code of 8 bits or less.
*Bytes are variable length (one to eight bits).<ref>{{cite web
 | url = http://people.cs.clemson.edu/~mark/stretch.html
 | title = IBM Stretch (7030) &mdash; Aggressive Uniprocessor Parallelism
 |date=July 2010 | access-date = 2013-12-07
 | author = Mark Smotherman | publisher = clemson.edu
}}</ref>

===Instruction format===
Instructions are either 32-bit or 64-bit.<ref>{{Cite book
 | url = http://bitsavers.org/pdf/ibm/7030/22-6530-2_7030RefMan.pdf
 | title = IBM 7030 Data Processing System Reference Manual
 | id = A22-6530-2
 | section = Control Format
 | section-url = http://bitsavers.org/pdf/ibm/7030/22-6530-2_7030RefMan.pdf#page=22
 | pages = 19–20
 | year = 1961
 | access-date = 2024-05-17
 | publisher = [[IBM]]
 | via = bitsavers.org
 }}</ref>

===Registers===
The registers overlay the first 32 addresses of memory as shown.<ref>{{Cite book
 | url = http://bitsavers.org/pdf/ibm/7030/22-6530-2_7030RefMan.pdf
 | title = IBM 7030 Data Processing System Reference Manual
 | id = A22-6530-2
 | section = Storage Assignment
 | section-url = http://bitsavers.org/pdf/ibm/7030/22-6530-2_7030RefMan.pdf#page=36
 | pages = 33–38
 | year = 1961
 | access-date = 2015-05-05
 | publisher = [[IBM]]
 | via = bitsavers.org
 }}</ref>

{| class="wikitable"
|-
!! Address !! Mnemonic !! Register !! Stored in:
|-
|| 0 || $Z || 64-bit zero: always reads as zero, cannot be changed by writes
|| Main core storage
|-
|rowspan="2"| 1
|| $IT || interval timer (bits 0..18): decremented at 1024&nbsp;Hz, recycles about every 8.5 minutes, at zero it turns on the "time signal indicator" in the indicator register
|rowspan="2"| Index core storage
|-
|| $TC || 36-bit time clock (bits 28..63): count of 1024&nbsp;Hz ticks, bits 38..63 increment once per second, recycles each ~777 days.
|-
|| 2
|| $IA || 18-bit interruption address
|| Main core storage
|-
|rowspan="3"| 3
||$UB || 18-bit upper boundary address (bits 0-17)
|rowspan="3"| Transistor register
|-
||$LB || 18-bit lower boundary address (bits 32-49)
|-
|| || 1-bit boundary control (bit 57): determines whether addresses within or outside the boundary addresses are protected
|-
|| 4
|| || 64-bit maintenance bits: only used for maintenance
|| Main core storage
|-
|| 5
|| $CA || channel address (bits 12..18): readonly, set by the "exchange", an i/o processor
|| Transistor register
|-
|| 6
|| $CPUS || other CPU bits (bits 0..18): signaling mechanism for a cluster of up to 20 CPUs
|| Transistor register
|-
|rowspan="2"| 7
|| $LZC || left zeroes count (bits 17..23): number of leading zero bits from a connective result or floating point operation
|rowspan="2"| Transistor register
|-
|| $AOC || all-ones count (bits 44..50): count of bits set in connective result or decimal multiple or divide
|-
|| 8
|| $L || Left half of 128-bit [[Accumulator (computing)|accumulator]]
|rowspan="3"| Transistor register
|-
|| 9
|| $R || Right half of 128-bit accumulator
|-
|| 10
|| $SB || accumulator sign byte (bits 0..7)
|-
|| 11
|| $IND || indicator register (bits 0..19)
|| Transistor register
|-
|| 12
|| $MASK || 64-bit mask register: bits 0..19 always 1, bits 20..47 writable, bits 48..63 always 0
|| Transistor register
|-
|| 13
|| $RM || 64-bit remainder register: set by integer and floating point divide instructions only
|| Main core storage
|-
|| 14
|| $FT || 64-bit factor register: changed only by the "load factor" instruction
|| Main core storage
|-
|| 15
|| $TR || 64-bit transit register
|| Main core storage
|-
|| 16<br>...<br>31
|| $X0<br>...<br>$X15 || 64-bit index registers (sixteen)
|| Index core storage
|}

The accumulator and index registers operate in [[Signed number representations#Sign–magnitude|sign-and-magnitude]] format.

===Memory===
Main memory is 16K to 256K 64-bit binary words, in banks of 16K.

The memory was immersion oil-heated/cooled to stabilize its operating characteristics.