Editing Integrated circuit packaging (section)

== History ==
[[File:Laptop Acrobat Model NBD 486C, Type DXh2 - California Micro Devices CMD 9324 on motherboard-9749.jpg|thumb|Small-outline integrated circuit. This package has 16 "gull wing" leads protruding from the two long sides and a lead spacing of 0.050 inches.]]
Early integrated circuits were packaged in [[Flatpack (electronics)|ceramic flat packs]], which the military used for many years for their reliability and small size. The other type of packaging used in the 1970s, called the ICP (Integrated Circuit Package), was a ceramic package (sometimes round as the transistor package), with the leads on one side, co-axially with the package axis.

Commercial circuit packaging quickly moved to the [[dual in-line package]] (DIP), first in ceramic and later in plastic.<ref>{{Cite book|title=Electronic Inventions and Discoveries (2nd ed).|last=Dummer|first=G.W.A.|publisher=Pergamon Press|year=1978|isbn=0-08-022730-9}}</ref> In the 1980s [[VLSI]] pin counts exceeded the practical limit for DIP packaging, leading to [[pin grid array]] (PGA) and [[leadless chip carrier]] (LCC) packages.<ref name=":2">{{Cite book|title=CMOS: Circuit Design, Layout, and Simulation, Third Edition|last=Baker|first=R. Jacob|publisher=Wiley-IEEE|year=2010|isbn=978-0-470-88132-3}}</ref> [[Surface mount]] packaging appeared in the early 1980s and became popular in the late 1980s, using finer lead pitch with leads formed as either gull-wing or J-lead, as exemplified by [[small-outline integrated circuit]]—a carrier which occupies an area about 30–50% less than an equivalent [[Dual in-line package|DIP]], with a typical thickness that is 70% less.<ref name=":2" />[[File:RUS-IC.JPG|right|thumb|Early USSR-made integrated circuit. The tiny block of semiconducting material (the "die"), is enclosed inside the round, metallic case (the "package").]]The next big innovation was the ''area array package'', which places the interconnection [[Terminal (electronics)|terminals]] throughout the surface area of the package, providing a greater number of connections than previous package types where only the outer perimeter is used. The first area array package was a ceramic [[pin grid array]] package.<ref name=":02"/> Not long after, the plastic [[ball grid array]] (BGA), another type of area array package, became one of the most commonly used packaging techniques.<ref>{{cite book|title=Area array packaging processes for BGA, Flip Chip, and CSP|publisher=[[McGraw-Hill Professional]]|year=2003|isbn=0-07-142829-1|page=251|author=Ken Gilleo}}</ref>

In the late 1990s, [[PQFP|plastic quad flat pack]] (PQFP) and [[thin small-outline package]]s (TSOP) replaced PGA packages as the most common for high pin count devices,<ref name=":02"/> though PGA packages are still often used for [[microprocessor]]s. However, industry leaders [[Intel]] and [[AMD]] transitioned in the 2000s from PGA packages to [[land grid array]] (LGA) packages.<ref>{{Cite web|url=http://www.intel.com/content/dam/www/public/us/en/documents/guides/lga-socket-and-package-technology-training-guide.pdf|title=Land Grid Array (LGA) Socket and Package Technology|website=Intel|access-date=April 7, 2016}}</ref>

[[Ball grid array]] (BGA) packages have existed since the 1970s, but evolved into flip-chip ball grid array (FCBGA) packages in the 1990s. FCBGA packages allow for much higher pin count than any existing package types. In an FCBGA package, the die is mounted upside-down (flipped) and connects to the [[package ball]]s via a substrate that is similar to a printed-circuit board rather than by wires.  FCBGA packages allow an array of input-output signals (called Area-I/O) to be distributed over the entire die rather than being confined to the die periphery.<ref>{{Cite web|url=http://flipchips.com/tutorial01.html |title=Flipchips: Tutorial #1 |last=Riley |first=George |date=2009-01-30 |access-date=2016-04-07 |url-status=unfit |archive-url=https://web.archive.org/web/20090130092400/http://flipchips.com/tutorial01.html |archive-date=January 30, 2009 }}</ref> Ceramic subtrates for BGA were replaced with organic substrates to reduce costs and use existing PCB manufacturing techniques to produce more packages at a time by using larger PCB panels during manufacturing.<ref>{{cite book | url=https://books.google.com/books?id=tyJZ3eZQy7UC&dq=hdi+pcb+ajinomoto&pg=PA243 | isbn=978-0-387-78219-5 | title=Materials for Advanced Packaging | date=17 December 2008 | publisher=Springer }}</ref>

Traces out of the die, through the package, and into the [[printed circuit board]] have very different electrical properties, compared to on-chip signals.  They require special design techniques and need much more electric power than signals confined to the chip itself.

Recent developments consist of stacking multiple dies in single package called SiP, for ''[[System In Package]]'', or [[three-dimensional integrated circuit]].  Combining multiple dies on a small substrate, often ceramic, is called an MCM, or [[Multi-Chip Module]]. The boundary between a big MCM and a small printed circuit board is sometimes blurry.<ref>R. Wayne Johnson, Mark Strickland and David Gerke, NASA Electronic Parts and Packaging Program. "[http://nepp.nasa.gov/docuploads/EA7E7EA1-BD30-4DA4-BD615FEA1A7F5AE9/3D%20Packaging%20Report%20071805.pdf 3-D Packaging: A Technology Review.]" June 23, 2005. Retrieved July 31, 2015</ref>