Editing Intel 4004 (section)

===Faggin joins===
Neither Hoff nor Mazor, who worked in the Applications Research group, had experience designing the actual silicon, and the design group was already overworked with the development of memory devices. In April 1970, [[Leslie L. Vadász|Leslie Vadász]], who ran the MOS design group, hired [[Federico Faggin]] from [[Fairchild Semiconductor]] to take over the project.{{sfn|Faggin|Hoff|Mazor|Shima|1996|p=16}} Faggin had already made a name for himself by leading the entire development of the MOS silicon gate technology and the design of the first commercial integrated circuit (IC) made with it. The new technology was going to change the entire semiconductor market.

Integrated circuits consist of a number of individual components like transistors and resistors that are produced by mixing the underlying silicon with "dopants". This is normally accomplished by heating the chip in the presence of a chemical gas, which diffuses into the surface. Previously, the individual components were connected together to make a circuit using [[aluminum]] wires deposited on the surface. As aluminum melts at 600 degrees and silicon at 1000, the traces typically had to be deposited as the last step, which often complicated the production cycle.

In 1967, [[Bell Labs]] released a paper about making MOS transistors with self-aligned gates made of silicon rather than metal. These devices, however, were a proof-of-concept and could not be used to make ICs. Faggin and [[Tom Klein]] had taken what was a curiosity and developed the entire process technology needed to fabricate reliable ICs. Faggin also designed and produced the [[Federico Faggin#Fairchild 3708|Fairchild 3708]],<ref>{{cite web |url=http://www.intel4004.com/images/elect_cov_pg1.jpg |title=A faster generation of MOS devices with low thresholds is riding the crest of the new wave, silicon-gate IC's |last=Faggin |first=Federico |access-date=June 3, 2017}}</ref> the first IC made with SGT, first sold at the end of 1968, and featured on the cover of ''Electronics'' in September 1969.<ref>{{cite web |url=http://www.intel4004.com/papers.htm |title=''Earliest Published Papers'' |last=Faggin |first=Federico |access-date=June 3, 2017}}</ref>{{sfn|Faggin|Hoff|Mazor|Shima|1996|p=16}} The silicon gate technology also reduced the leakage current by more than 100 times, making possible sophisticated dynamic circuits like DRAMs (dynamic random access memories). It also allowed the highly-doped silicon used for the gates to form the interconnections, greatly improving the circuit density of random-logic ICs like microprocessors.

This technique meant the interconnections could be performed at any time in the process. More importantly, the wiring was deposited using the same equipment that made the rest of the components. This meant that the slight differences in layout between different machine types was eliminated. Previously the interconnects had to be much larger than required in order to ensure the aluminum touched the silicon components which would be offset due to inaccuracies in the machinery. With this issue eliminated, the circuits could be placed much closer together, immediately doubling the density of the components, and thus reducing their cost by the same amount. Additionally, the aluminum wiring acted as [[capacitor]]s which limited the signal speed; removing these allowed the chips to run at faster speeds.<ref>{{cite web |url=http://www.intel4004.com/mrld.htm |title=The New Methodology for Random Logic Design |last=Faggin |first=Federico |access-date=June 3, 2017}}</ref><ref>Federico Faggin, T. Klein (1970). "Silicon-Gate Technology". ''Solid State Electronics''. Vol. 13. pp. 1125–1144</ref>

At Intel, Faggin began design of the new processor using this self-aligned gate process. Only days after Faggin joined the company Intel, Shima arrived from Japan. He was disappointed to learn that no work on the project had taken place since he left in December, and expressed his concern original schedule was now impossible. Faggin responded by working well into the night every day, and Shima stayed on for another six months to help. Faggin himself immersed himself in workweeks that spanned 70 to 80 hours.<ref>{{cite journal |first=Stephan |last=Cass |year=2021 |title=Intel's 4004 Turns 50 |journal=IEEE Spectrum |volume=58 |issue=11 |pages=9–10}}</ref> Additional advances were needed to reach the required circuit density. One of these advances was the use of "buried contacts"<ref>{{cite web |url=http://www.intel4004.com/buried.htm |title=The Buried Contact |last=Faggin |first=Federico |access-date=June 3, 2017}}</ref><ref>"Inductee Detail". National Inventors Hall of Fame. July 25, 2016.</ref> that allowed the silicon connecting wires to be directly connected to the components. Another was figuring out how to make adding "bootstrap loads" with silicon gate as part of one of the masking steps,<ref>{{cite web |url=http://www.intel4004.com/btstrp.htm |title=The Bootstrap Load |last=Faggin| first=Federico |access-date=June 3, 2017}}</ref> eliminating one step from the processing.{{sfn|Faggin|Hoff|Mazor|Shima|1996|p=16}} Without these two innovations by Faggin, Hoff's architecture could not have been realized in a single chip.