Editing Numerically controlled oscillator (section)

===Phase truncation spurs===
The number of phase accumulator bits of an NCO (N) is usually between 16 and 64. If the PA output word were used directly to index the PAC look-up table an untenably high storage capacity in the ROM would be required. As such, the PA output word must be truncated to span a reasonable memory space. Truncation of the phase word causes [[phase modulation]] of the output sinusoid which introduces non-harmonic [[distortion]] in proportion to the number of bits truncated. The number of spurious products created by this distortion is given by:
:<math>n_W=\frac{2^W}{\mbox{GCD}(\Delta F,2^W)}-1</math> &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp;(3)

where W is the number of bits truncated.

In calculating the [[spurious-free dynamic range]], we are interested in the spurious product with the largest amplitude relative to the carrier output level given by:

:<math>\zeta _{max}=2^{-M} \frac{\pi \mbox{GCD}(\Delta F,2^W)}{\sin \left( \pi \cdot 2^{-P}\mbox{GCD}(\Delta F,2^W) \right)}</math>

where P is the size of the phase-to-amplitude converter's lookup table in bits, i.e., M in Figure 1. For W >4,

:<math>\zeta _{max} \approx -6.02 \cdot P\;\mbox{dBc}.</math>

Another related spurious generation method is the slight modulation due to the GRR outlined above. The amplitude of these spurs is low for large N and their frequency is generally too low to be detectable but they may cause issues for some applications.<ref name="Grzeg"/>

One way to reduce the truncation in the address lookup is to have several smaller lookup tables in parallel and use the upper bits to index into the tables and the lower bits to weigh them for linear or quadratic interpolation. Ie use a 24-bit phase accumulator to look up into two 16-bit LUTS. Address into the truncated 16 MSBs, and that plus 1. Linearly interpolate using the 8 LSBs as weights. (One could instead use 3 LUTs instead and quadratically interpolate). This can result in decreased distortion for the same amount of memory at the cost of some multipliers.