Editing Sum-addressed decoder (section)

==Gate-level implementation==
<div style="float:right; margin: 0 0 1em 1em; background:#ddddff;">
     R<sub>13</sub> ... R<sub>6</sub>  R<sub>5</sub>  R<sub>4</sub>  R<sub>3</sub>
     O<sub>13</sub> ... O<sub>6</sub>  O<sub>5</sub>  O<sub>4</sub>  O<sub>3</sub>
     L<sub>13</sub> ... L<sub>6</sub>  L<sub>5</sub>  L<sub>4</sub>  L<sub>3</sub>
 --------------------------
     S<sub>13</sub> ... S<sub>6</sub>  S<sub>5</sub>  S<sub>4</sub>  S<sub>3</sub>
 C<sub>14</sub> C<sub>13</sub> ... C<sub>6</sub>  C<sub>5</sub>  C<sub>4</sub>
</div>

Before collapsing redundancy between rows, review:

Each row of each decoder for each of two banks implements a set of full adders which reduce the three numbers to be added (R[13:3], O[13:3], and L) to two numbers (S[14:4] and C[13:3]). The LSB (==S[3]) is discarded. Carry out (==C[14]) is also discarded. The row matches if S[13:4] == ~C[13:4], which is &( xor(S[13:4], C[13:4])).

It is possible to partially specialize the full adders to 2-input AND, OR, XOR, and XNOR because the L input is constant. The resulting expressions are common to all lines of the decoder and can be collected at the bottom.

 S<sub>0;i  </sub> = S(R<sub>i</sub>, O<sub>i</sub>, 0) = R<sub>i</sub> xor O<sub>i</sub>
 S<sub>1;i  </sub> = S(R<sub>i</sub>, O<sub>i</sub>, 1) = R<sub>i</sub> xnor O<sub>i</sub>
 C<sub>0;i+1</sub> = C(R<sub>i</sub>, O<sub>i</sub>, 0) = R<sub>i</sub> and O<sub>i</sub>
 C<sub>1;i+1</sub> = C(R<sub>i</sub>, O<sub>i</sub>, 1) = R<sub>i</sub> or O<sub>i</sub>.

At each digit position, there are only two possible S<sub>i</sub>,
two possible C<sub>i</sub>, and four possible XORs between them:

 L<sub>i</sub>=0 and L<sub>i-1</sub>=0: X<sub>0;0;i</sub> = S<sub>0;i</sub> xor C<sub>0;i</sub> = R<sub>i</sub> xor O<sub>i</sub> xor (R<sub>i-1</sub> and O<sub>i-1</sub>)
 L<sub>i</sub>=0 and L<sub>i-1</sub>=1: X<sub>0;1;i</sub> = S<sub>0;i</sub> xor C<sub>1;i</sub> = R<sub>i</sub> xor O<sub>i</sub> xor (R<sub>i-1</sub> or O<sub>i-1</sub>)
 L<sub>i</sub>=1 and L<sub>i-1</sub>=0: X<sub>1;0;i</sub> = S<sub>1;i</sub> xor C<sub>0;i</sub> = R<sub>i</sub> xnor O<sub>i</sub> xor (R<sub>i-1</sub> and O<sub>i-1</sub>) = !X<sub>0;0;i</sub>
 L<sub>i</sub>=1 and L<sub>i-1</sub>=1: X<sub>1;1;i</sub> = S<sub>1;i</sub> xor C<sub>1;i</sub> = R<sub>i</sub> xnor O<sub>i</sub> xor (R<sub>i-1</sub> or O<sub>i-1</sub>)  = !X<sub>0;1;i</sub>

One possible decoder for the example might calculate these four expressions for each of the bits 4..13, and drive all 40 wires up the decoder. Each line of the decoder would select one of the four wires for each bit, and consist of a 10-input AND.